On 9/3/2024 4:00 PM, Krzysztof Kozlowski wrote: > On 03/09/2024 09:30, Jingyi Wang wrote: >> >> >> On 9/3/2024 3:10 PM, Krzysztof Kozlowski wrote: >>> On Tue, Sep 03, 2024 at 02:21:29PM +0800, Jingyi Wang wrote: >>>> Add a property "num-banks" for errata. >>> >>> This you said in commit subject and we see in the diff. You *MUST* >>> explain why. >>> Usually the num of LLCC banks is read from hardware, but there is errata on some SoCs to get the wrong bank num from LLCC_COMMON_STATUS0. Add a property "num-banks" to indicate the accurate data. >>>> >>>> Signed-off-by: Jingyi Wang <quic_jingyw@xxxxxxxxxxx> >>>> --- >>>> Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 5 +++++ >>>> 1 file changed, 5 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml >>>> index 68ea5f70b75f..03241b719c98 100644 >>>> --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml >>>> +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml >>>> @@ -56,6 +56,11 @@ properties: >>>> items: >>>> - const: multi-chan-ddr >>>> >>>> + num-banks: >>> >>> No vendor prefix? So this is generic property? Then add to some common >>> schema with proper explanation WHY. >>> will qcom,num-banks be okay? >>>> + $ref: /schemas/types.yaml#/definitions/uint32 >>>> + description: >>>> + The num of llcc banks >>> >>> And what are llcc (or LLCC?) banks? >>> >>> LLCC banks means LLCC register regions with same memory size and reg offset and different memory base for LLCC configuration. >> Will add the vendor prefix and description in the next series. > > You did not provide rationale nor answer to concerns so far. > > Best regards, > Krzysztof > Thanks, Jingyi
