On 26.08.2024 19:53, Claudiu Beznea wrote:
> According to datasheet, Chapter 34. Clock Generator, section 34.2,
> Embedded characteristics, source clock for RTT is the TD_SLCK, registered
> with ID 1 by the slow clock controller driver. Fix RTT clock.
>
> Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
> Signed-off-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxx>
Applied to at91-dt, thanks!
