On 8/30/2024 9:47 PM, Beleswar Padhi wrote:
From: Apurva Nandan <a-nandan@xxxxxx> The K3 J722S-EVM platform is based on the J722S SoC which has one single-core Arm Cortex-R5F processor in each of the WAKEUP, MCU and MAIN voltage domain, and two C71x DSP subsystems in MAIN voltage domain. The Inter-Processor communication between the A53 cores and these R5F and DSP remote cores is achieved through shared memory and Mailboxes. Thus, add the memory carveouts and enable the mailbox clusters required for communication. Also, The remoteproc firmware like of R5F and DSPs in the MAIN voltage domain use timers. Therefore, change the status of the timer nodes to "reserved" to avoid any clash during booting of remotecores. Usage is described as below: +===================+=============+ | Remoteproc Node | Timer Node | +===================+=============+ | main_r5fss0_core0 | main_timer0 | +-------------------+-------------+ | c7x_0 | main_timer1 | +-------------------+-------------+ | c7x_1 | main_timer2 | +-------------------+-------------+
Reviewed-by: Udit Kumar<u-kumar1@xxxxxx>
Signed-off-by: Apurva Nandan <a-nandan@xxxxxx> [ Enabled mailbox instances and Reserved timer nodes ] Signed-off-by: Beleswar Padhi <b-padhi@xxxxxx> --- v5: Changelog: 1) Updated commit message to correctly reflect the host core name (A53 not A72). 2) Updated mbox DT node label and name to "mbox_wkup_r5_0" from "mbox_r5_0" for clarity. [..]
