On 30/08/2024 10:10, Jerome Brunet wrote:
On Fri 30 Aug 2024 at 10:00, Neil Armstrong <neil.armstrong@xxxxxxxxxx> wrote:
Hi Jerome,
On 30/08/2024 07:26, Xianwei Zhao via B4 Relay wrote:
From: Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx>
Add C3 PLL controller input clock parameters "fix".
The clock named "fix" was initially implemented in PLL clock controller
driver. However, some registers required secure zone access, so we moved
it to the secure zone (BL31) and accessed it through SCMI. Since the PLL
clock driver needs to use this clock, the "fix" clock is used as an input
source. We updated the driver but forgot to modify the binding accordingly,
so we are adding it here.
It is an ABI break but on a new and immature platform. Noboby could
really
use that platform at this stage, so nothing is going to break on anyone
really.
Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock
controller")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Signed-off-by: Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx>
---
Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
So you mind if I take this one via my arm64-dt tree ?
There is no conflicting change in my tree so it's fine, yes.
Thanks
Neil
Neil
<snip>
