On 8/29/24 02:12, Aniket Limaye wrote:
> From: Jared McArthur <j-mcarthur@xxxxxx>
>
> Commit 0d0a0b441346 ("arm64: dts: ti: k3-j7200: fix main pinmux
> range") split the main_pmx0 into two nodes: main_pmx0 and main_pmx1
> due to a non-addressable region, but incorrectly represented the
> ranges. As a result, the memory map for the pinctrl is incorrect. Fix
> this by introducing the correct ranges.
>
> The ranges are taken from the J7200 TRM (Table 5-695. CTRL_MMR0
> Registers). Padconfig registers stretch from 0x11c000 to 0x11c168
> with non-addressable portions from 0x11c10c to 0x11c10f, 0x11x114 to
> 0x11c11b, and 0x11c128 to 0x11c163.
Still unsure whether these registers are correct. There is a
conflict between the TRM [1] and the datasheet [2] on whether
PADCONFIG63 exists. The datasheet doesn't think it does. I would like
to confirm this before the patch is submitted/accepted, because the
pinmuxing would need to change again if the datasheet is correct.
[1] https://www.ti.com/lit/pdf/spruiu1
[2] https://www.ti.com/lit/gpn/dra821u
> Link: https://www.ti.com/lit/ug/spruiu1c/spruiu1c.pdf (TRM)
> Fixes: 0d0a0b441346 ("arm64: dts: ti: k3-j7200: fix main pinmux range")
> Signed-off-by: Jared McArthur <j-mcarthur@xxxxxx>
> Signed-off-by: Aniket Limaye <a-limaye@xxxxxx>
[...]
--
Best,
Jared McArthur
