We just got our hands on hardware that only supports 32-bit access width to the SRAM being used. This patch series adds support for the 'reg-io-width' property and allows us to specify the exact access width that the SRAM supports. Changes in v4: - added alignment warnings in case the source/destination/count are not a 4 bytes multiple - switched to __ioread32_copy/__iowrite32_copy per Sudeep's suggestion - dropped volatile qualifiers to permit that switch Changes in v3: - added missing documentation for the structure members being added - removed the use of a macro for the 32-bit only operation, this gets rid of a number of checkpatch warnings - added missing trailing barriers - corrected binding indentation Changes in v2: - fixed typo in the binding and added reviewed-by tag from Krzysztof - determine the correct I/O operation at the time we parse the 'reg-io-width' property rather than for each tx_prepare/fetch_response/fetch_notification call - dropped support for 1 and 2 bytes 'reg-io-width' as they do not quite make sense, if we can support such smaller access size, then we can support the larger 4 byte access width, too, and there are many places within the SCMI code where ioread32/iowrite32 are used Florian Fainelli (2): dt-bindings: sram: Document reg-io-width property firmware: arm_scmi: Support 'reg-io-width' property for shared memory .../devicetree/bindings/sram/sram.yaml | 6 ++ drivers/firmware/arm_scmi/common.h | 32 +++++++- .../arm_scmi/scmi_transport_mailbox.c | 13 +++- .../firmware/arm_scmi/scmi_transport_optee.c | 11 ++- .../firmware/arm_scmi/scmi_transport_smc.c | 11 ++- drivers/firmware/arm_scmi/shmem.c | 78 +++++++++++++++++-- 6 files changed, 130 insertions(+), 21 deletions(-) -- 2.34.1
