On 27.08.24 08:37, Krzysztof Kozlowski wrote: > On Mon, Aug 26, 2024 at 11:50:04PM +0200, Jan Kiszka wrote: >> From: Jan Kiszka <jan.kiszka@xxxxxxxxxxx> >> >> Describe also the VMAP registers which are needed in order to make use >> of the PVU with this PCI host. Furthermore, permit to specify a >> restricted DMA pool by phandle. > > That's an ABI break without explanation why it is necessary. > It is needed in order to support the PVU, as written above. Previous versions of this binding likely didn't consider this use case and therefore didn't describe all registers associated with the hardware. BTW, if you see a way to add the required registers without breaking more than needed, I'm all ears. At least the kernel driver will continue to work with older DTs when you disable PVU support or do not add a DMA pool to the DT. Jan >> >> Signed-off-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx> >> --- >> .../devicetree/bindings/pci/ti,am65-pci-host.yaml | 13 ++++++++++--- >> 1 file changed, 10 insertions(+), 3 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml >> index 0a9d10532cc8..72f78f21e1e8 100644 >> --- a/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml >> +++ b/Documentation/devicetree/bindings/pci/ti,am65-pci-host.yaml >> @@ -20,7 +20,7 @@ properties: >> - ti,keystone-pcie >> >> reg: >> - maxItems: 4 >> + maxItems: 6 >> >> reg-names: >> items: >> @@ -28,6 +28,8 @@ properties: >> - const: dbics >> - const: config >> - const: atu >> + - const: vmap_lp >> + - const: vmap_hp >> >> interrupts: >> maxItems: 1 >> @@ -69,6 +71,9 @@ properties: >> items: >> pattern: '^pcie-phy[0-1]$' >> >> + memory-region: >> + description: phandle to restricted DMA pool to be used for all devices behind this controller > > missing constraints, maxItems > > Best regards, > Krzysztof > -- Siemens AG, Technology Linux Expert Center
