Add the DT schema for the GPIO driver of the NXP S32G2/S32G3 SoCs. Signed-off-by: Phu Luu An <phu.luuan@xxxxxxx> Signed-off-by: Larisa Grigore <larisa.grigore@xxxxxxx> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@xxxxxxx> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@xxxxxxxxxxx> --- .../bindings/gpio/nxp,gpio-siul2-s32g2.yaml | 134 ++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/nxp,gpio-siul2-s32g2.yaml diff --git a/Documentation/devicetree/bindings/gpio/nxp,gpio-siul2-s32g2.yaml b/Documentation/devicetree/bindings/gpio/nxp,gpio-siul2-s32g2.yaml new file mode 100644 index 000000000000..fba41a18d4c8 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/nxp,gpio-siul2-s32g2.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause +# Copyright 2024 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/nxp,gpio-siul2-s32g2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32G2 SIUL2 GPIO controller + +maintainers: + - Ghennadi Procopciuc <Ghennadi.Procopciuc@xxxxxxx> + - Larisa Grigore <larisa.grigore@xxxxxxx> + - Andrei Stefanescu <andrei.stefanescu@xxxxxxxxxxx> + +description: | + Support for the SIUL2 GPIOs found on the S32G2 and S32G3 + chips. It includes an IRQ controller for all pins which have + an EIRQ associated. + +properties: + compatible: + items: + - const: nxp,s32g2-siul2-gpio + + reg: + description: | + A list of register regions for configuring interrupts, + GPIO output values and reading GPIO input values. + items: + - description: PGPDO (output value) registers for SIUL2_0 + - description: PGPDO (output value) registers for SIUL2_1 + - description: PGPDI (input value) registers for SIUL2_0 + - description: PGPDI (input value) registers for SIUL2_1 + - description: EIRQ (interrupt) configuration registers from SIUL2_1 + - description: EIRQ IMCR registers for interrupt muxing between pads + + reg-names: + items: + - const: opads0 + - const: opads1 + - const: ipads0 + - const: ipads1 + - const: eirqs + - const: eirq-imcrs + + interrupts: + description: + The port interrupt shared by all 32 EIRQs. + + gpio-controller: + description: + Marks the device node as a gpio controller + + "#gpio-cells": + description: | + Should be two. The first cell is the pin number and + the second cell is used to specify the gpio polarity + 0 = active high + 1 = active low + + interrupt-controller: + description: + Marks the device node as an interrupt controller + + "#interrupt-cells": + const: 2 + description: + Refer to ../interrupt-controller/interrupts.txt for more details. + + gpio-ranges: + description: + Interaction with the PINCTRL subsystem + Refer to gpio.txt for more details. + + gpio-reserved-ranges: + description: + A list of start GPIO and number of GPIO pairs which are unusable. + Refer to gpio.txt for more details. + +patternProperties: + "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$": + additionalProperties: false + type: object + properties: + gpio-hog: true + gpios: true + input: true + output-high: true + output-low: true + line-name: true + required: + - gpio-hog + - gpios + +required: + - compatible + - interrupts + - reg + - reg-names + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + + gpio: siul2-gpio@4009d700 { + compatible = "nxp,s32g2-siul2-gpio"; + reg = <0x4009d700 0x10>, + <0x44011700 0x18>, + <0x4009d740 0x10>, + <0x44011740 0x18>, + <0x44010010 0xb4>, + <0x44011078 0x80>; + reg-names = "opads0", "opads1", "ipads0", + "ipads1", "eirqs", "eirq-imcrs"; + gpio-controller; + #gpio-cells = <2>; + /* GPIO 0-101 */ + gpio-ranges = <&pinctrl 0 0 102>, + /* GPIO 112-190 */ + <&pinctrl 112 112 79>; + gpio-reserved-ranges = <102 10>, <123 21>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; + }; -- 2.45.2
