On 12:36-20240820, Bhavya Kapoor wrote: > The J722S-EVM has 3 PWM outputs and 1 ECAP output routed > to the J28 connector. This overlay will set the appropriate > pinmux and enable PWM and ECAP on the pins. So, change the base evm default. do you have a daughter card that this overlay represents? Then name this as the daughter card, provide a link etc. If we start accepting ever pin mux combination, there is no end to configurations we will get. Sorry. > > Currently enabled PWM output on J28: 29, 31, 33 pins > and ECAP output on J28: 32 pin > > Signed-off-by: Bhavya Kapoor <b-kapoor@xxxxxx> > --- > arch/arm64/boot/dts/ti/Makefile | 1 + > arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso | 53 ++++++++++++++++++++ > 2 files changed, 54 insertions(+) > create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > index e20b27ddf901..61d51284dcba 100644 > --- a/arch/arm64/boot/dts/ti/Makefile > +++ b/arch/arm64/boot/dts/ti/Makefile > @@ -111,6 +111,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo > > # Boards with J722s SoC > dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm.dtb > +dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-pwm.dtbo > > # Boards with J784s4 SoC > dtb-$(CONFIG_ARCH_K3) += k3-am69-sk.dtb > diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso b/arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso > new file mode 100644 > index 000000000000..f6d1f072b140 > --- /dev/null > +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm-pwm.dtso > @@ -0,0 +1,53 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/** > + * DT Overlay for enabling PWM output on User Expansion header on J722S-EVM > + * > + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/gpio/gpio.h> > +#include "k3-pinctrl.h" > + > +&main_pmx0 { > + > + main_epwm0_pins_default: main-epwm0-default-pins { > + pinctrl-single,pins = < > + J722S_IOPAD(0x01b4, PIN_OUTPUT, 2) /* (B20) EHRPWM0_A */ > + >; > + }; > + > + main_epwm1_pins_default: main-epwm1-default-pins { > + pinctrl-single,pins = < > + J722S_IOPAD(0x01bc, PIN_OUTPUT, 2) /* (D20) EHRPWM1_A */ > + J722S_IOPAD(0x01c0, PIN_OUTPUT, 2) /* (E19) EHRPWM1_B */ > + >; > + }; > + > + main_ecap0_pins_default: main-ecap0-default-pins { > + pinctrl-single,pins = < > + J722S_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C20) ECAP0_IN_APWM_OUT */ > + >; > + }; > +}; > + > +&epwm0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_epwm0_pins_default>; > + status = "okay"; > +}; > + > +&epwm1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_epwm1_pins_default>; > + status = "okay"; > +}; > + > +&ecap0 { > + /* ECAP in APWM mode */ > + pinctrl-names = "default"; > + pinctrl-0 = <&main_ecap0_pins_default>; > + status = "okay"; > +}; > -- > 2.34.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
