From: Yiting Deng <yiting.deng@xxxxxxxxxxx> Add documentation describing the Amlogic A113L2 and A113X2 rtc controller. Signed-off-by: Yiting Deng <yiting.deng@xxxxxxxxxxx> Signed-off-by: Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx> --- .../bindings/rtc/amlogic,amlogic-rtc.yaml | 66 ++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml b/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml new file mode 100644 index 000000000000..fa3d7838022e --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/amlogic,amlogic-rtc.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2024 Amlogic, Inc. All rights reserved +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/amlogic,amlogic-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic Real Time Clock controller include a4, a5 + +maintainers: + - Yiting Deng <yiting.deng@xxxxxxxxxxx> + - Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx> + +description: + The Amlogic new chips used RTC module. + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + enum: + - amlogic,a4-rtc + - amlogic,a5-rtc + + reg: + maxItems: 1 + + clocks: + items: + - description: RTC clock source, available 24M or 32K crystal + oscillator source. when using 24M, need to divide 24M into 32K. + - description: RTC module accesses the clock of the apb bus. + + clock-names: + items: + - const: rtc_osc + - const: rtc_sys_clk + + interrupts: + maxItems: 1 + +required: + - compatible + - interrupts + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + apb { + #address-cells = <2>; + #size-cells = <2>; + + rtc: rtc@8e600 { + compatible = "amlogic,a4-rtc"; + interrupts = <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>; + reg = <0x0 0x8e600 0x0 0x38>; + clocks = <&xtal_32k>, <&clkc_periphs 1>; + clock-names = "rtc_osc", "rtc_sys_clk"; + }; + }; -- 2.37.1
