Re: [PATCH v2 11/36] soc: fsl: cpm1: tsa: Introduce tsa_setup() and its CPM1 compatible version

[Christophe Leroy <christophe.leroy@xxxxxxxxxx>]

Le 08/08/2024 à 09:11, Herve Codina a écrit :
> Current code handles the CPM1 version of TSA. Setting up TSA consists in
> handling SIMODE and SIGMR registers. These registers are CPM1 specific.
>
> Setting up the QUICC Engine (QE) version of TSA is slightly different.
>
> In order to prepare the support for QE version, clearly identify these
> registers as CPM1 compatible and isolate their handling in a CPM1
> specific function.
>
> Signed-off-by: Herve Codina <herve.codina@xxxxxxxxxxx>

Reviewed-by: Christophe Leroy <christophe.leroy@xxxxxxxxxx>


> ---
>   drivers/soc/fsl/qe/tsa.c | 93 +++++++++++++++++++++++-----------------
>   1 file changed, 54 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/soc/fsl/qe/tsa.c b/drivers/soc/fsl/qe/tsa.c
> index bf7354ebaca4..239b71187e07 100644
> --- a/drivers/soc/fsl/qe/tsa.c
> +++ b/drivers/soc/fsl/qe/tsa.c
> @@ -32,14 +32,14 @@
>   #define TSA_CPM1_SIRAM_ENTRY_CSEL_SMC2	FIELD_PREP_CONST(TSA_CPM1_SIRAM_ENTRY_CSEL_MASK, 0x6)
>   
>   /* SI mode register (32 bits) */
> -#define TSA_SIMODE	0x00
> -#define   TSA_SIMODE_SMC2			BIT(31)
> -#define   TSA_SIMODE_SMC1			BIT(15)
> -#define   TSA_SIMODE_TDMA_MASK			GENMASK(11, 0)
> -#define   TSA_SIMODE_TDMA(x)			FIELD_PREP(TSA_SIMODE_TDMA_MASK, x)
> -#define   TSA_SIMODE_TDMB_MASK			GENMASK(27, 16)
> -#define   TSA_SIMODE_TDMB(x)			FIELD_PREP(TSA_SIMODE_TDMB_MASK, x)
> -#define     TSA_SIMODE_TDM_MASK			GENMASK(11, 0)
> +#define TSA_CPM1_SIMODE		0x00
> +#define   TSA_CPM1_SIMODE_SMC2			BIT(31)
> +#define   TSA_CPM1_SIMODE_SMC1			BIT(15)
> +#define   TSA_CPM1_SIMODE_TDMA_MASK		GENMASK(11, 0)
> +#define   TSA_CPM1_SIMODE_TDMA(x)		FIELD_PREP(TSA_CPM1_SIMODE_TDMA_MASK, x)
> +#define   TSA_CPM1_SIMODE_TDMB_MASK		GENMASK(27, 16)
> +#define   TSA_CPM1_SIMODE_TDMB(x)		FIELD_PREP(TSA_CPM1_SIMODE_TDMB_MASK, x)
> +#define     TSA_CPM1_SIMODE_TDM_MASK		GENMASK(11, 0)
>   #define     TSA_SIMODE_TDM_SDM_MASK		GENMASK(11, 10)
>   #define       TSA_SIMODE_TDM_SDM_NORM		FIELD_PREP_CONST(TSA_SIMODE_TDM_SDM_MASK, 0x0)
>   #define       TSA_SIMODE_TDM_SDM_ECHO		FIELD_PREP_CONST(TSA_SIMODE_TDM_SDM_MASK, 0x1)
> @@ -49,22 +49,22 @@
>   #define     TSA_SIMODE_TDM_RFSD(x)		FIELD_PREP(TSA_SIMODE_TDM_RFSD_MASK, x)
>   #define     TSA_SIMODE_TDM_DSC			BIT(7)
>   #define     TSA_SIMODE_TDM_CRT			BIT(6)
> -#define     TSA_SIMODE_TDM_STZ			BIT(5)
> +#define     TSA_CPM1_SIMODE_TDM_STZ		BIT(5)
>   #define     TSA_SIMODE_TDM_CE			BIT(4)
>   #define     TSA_SIMODE_TDM_FE			BIT(3)
>   #define     TSA_SIMODE_TDM_GM			BIT(2)
>   #define     TSA_SIMODE_TDM_TFSD_MASK		GENMASK(1, 0)
>   #define     TSA_SIMODE_TDM_TFSD(x)		FIELD_PREP(TSA_SIMODE_TDM_TFSD_MASK, x)
>   
> -/* SI global mode register (8 bits) */
> -#define TSA_SIGMR	0x04
> -#define TSA_SIGMR_ENB			BIT(3)
> -#define TSA_SIGMR_ENA			BIT(2)
> -#define TSA_SIGMR_RDM_MASK		GENMASK(1, 0)
> -#define   TSA_SIGMR_RDM_STATIC_TDMA	FIELD_PREP_CONST(TSA_SIGMR_RDM_MASK, 0x0)
> -#define   TSA_SIGMR_RDM_DYN_TDMA	FIELD_PREP_CONST(TSA_SIGMR_RDM_MASK, 0x1)
> -#define   TSA_SIGMR_RDM_STATIC_TDMAB	FIELD_PREP_CONST(TSA_SIGMR_RDM_MASK, 0x2)
> -#define   TSA_SIGMR_RDM_DYN_TDMAB	FIELD_PREP_CONST(TSA_SIGMR_RDM_MASK, 0x3)
> +/* CPM SI global mode register (8 bits) */
> +#define TSA_CPM1_SIGMR	0x04
> +#define TSA_CPM1_SIGMR_ENB			BIT(3)
> +#define TSA_CPM1_SIGMR_ENA			BIT(2)
> +#define TSA_CPM1_SIGMR_RDM_MASK			GENMASK(1, 0)
> +#define   TSA_CPM1_SIGMR_RDM_STATIC_TDMA	FIELD_PREP_CONST(TSA_CPM1_SIGMR_RDM_MASK, 0x0)
> +#define   TSA_CPM1_SIGMR_RDM_DYN_TDMA		FIELD_PREP_CONST(TSA_CPM1_SIGMR_RDM_MASK, 0x1)
> +#define   TSA_CPM1_SIGMR_RDM_STATIC_TDMAB	FIELD_PREP_CONST(TSA_CPM1_SIGMR_RDM_MASK, 0x2)
> +#define   TSA_CPM1_SIGMR_RDM_DYN_TDMAB		FIELD_PREP_CONST(TSA_CPM1_SIGMR_RDM_MASK, 0x3)
>   
>   /* SI clock route register (32 bits) */
>   #define TSA_SICR	0x0C
> @@ -656,13 +656,45 @@ static void tsa_init_si_ram(struct tsa *tsa)
>   		tsa_write32(tsa->si_ram + i, TSA_CPM1_SIRAM_ENTRY_LAST);
>   }
>   
> +static int tsa_cpm1_setup(struct tsa *tsa)
> +{
> +	u32 val;
> +
> +	/* Set SIMODE */
> +	val = 0;
> +	if (tsa->tdm[0].is_enable)
> +		val |= TSA_CPM1_SIMODE_TDMA(tsa->tdm[0].simode_tdm);
> +	if (tsa->tdm[1].is_enable)
> +		val |= TSA_CPM1_SIMODE_TDMB(tsa->tdm[1].simode_tdm);
> +
> +	tsa_clrsetbits32(tsa->si_regs + TSA_CPM1_SIMODE,
> +			 TSA_CPM1_SIMODE_TDMA(TSA_CPM1_SIMODE_TDM_MASK) |
> +			 TSA_CPM1_SIMODE_TDMB(TSA_CPM1_SIMODE_TDM_MASK),
> +			 val);
> +
> +	/* Set SIGMR */
> +	val = (tsa->tdms == BIT(TSA_TDMA)) ?
> +		TSA_CPM1_SIGMR_RDM_STATIC_TDMA : TSA_CPM1_SIGMR_RDM_STATIC_TDMAB;
> +	if (tsa->tdms & BIT(TSA_TDMA))
> +		val |= TSA_CPM1_SIGMR_ENA;
> +	if (tsa->tdms & BIT(TSA_TDMB))
> +		val |= TSA_CPM1_SIGMR_ENB;
> +	tsa_write8(tsa->si_regs + TSA_CPM1_SIGMR, val);
> +
> +	return 0;
> +}
> +
> +static int tsa_setup(struct tsa *tsa)
> +{
> +	return tsa_cpm1_setup(tsa);
> +}
> +
>   static int tsa_probe(struct platform_device *pdev)
>   {
>   	struct device_node *np = pdev->dev.of_node;
>   	struct resource *res;
>   	struct tsa *tsa;
>   	unsigned int i;
> -	u32 val;
>   	int ret;
>   
>   	tsa = devm_kzalloc(&pdev->dev, sizeof(*tsa), GFP_KERNEL);
> @@ -696,26 +728,9 @@ static int tsa_probe(struct platform_device *pdev)
>   	if (ret)
>   		return ret;
>   
> -	/* Set SIMODE */
> -	val = 0;
> -	if (tsa->tdm[0].is_enable)
> -		val |= TSA_SIMODE_TDMA(tsa->tdm[0].simode_tdm);
> -	if (tsa->tdm[1].is_enable)
> -		val |= TSA_SIMODE_TDMB(tsa->tdm[1].simode_tdm);
> -
> -	tsa_clrsetbits32(tsa->si_regs + TSA_SIMODE,
> -			 TSA_SIMODE_TDMA(TSA_SIMODE_TDM_MASK) |
> -			 TSA_SIMODE_TDMB(TSA_SIMODE_TDM_MASK),
> -			 val);
> -
> -	/* Set SIGMR */
> -	val = (tsa->tdms == BIT(TSA_TDMA)) ?
> -		TSA_SIGMR_RDM_STATIC_TDMA : TSA_SIGMR_RDM_STATIC_TDMAB;
> -	if (tsa->tdms & BIT(TSA_TDMA))
> -		val |= TSA_SIGMR_ENA;
> -	if (tsa->tdms & BIT(TSA_TDMB))
> -		val |= TSA_SIGMR_ENB;
> -	tsa_write8(tsa->si_regs + TSA_SIGMR, val);
> +	ret = tsa_setup(tsa);
> +	if (ret)
> +		return ret;
>   
>   	platform_set_drvdata(pdev, tsa);
>