On Fri, Aug 23, 2024 at 10:29:17AM +0800, Xianwei Zhao wrote: > Add C3 PLL controller input clock parameters "fix". > > The clock named "fix" was initially implemented in PLL clock controller driver. > However, some registers required secure zone access, so we moved it to > the secure zone (BL31) and accessed it through SCMI. Since the PLL clock > driver needs to use this clock, the "fix" clock is used as an input source. > We updated the driver but forgot to modify the binding accordingly, Please wrap commit message according to Linux coding style / submission process (neither too early nor over the limit): https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597 Best regards, Krzysztof
