Add support for clocks and resets on the rk3576. Patches from downstream have been squashed and rebased. The resets have been renumbered without gaps and their actual register/bit information is set in rst-rk3576.c as it has been done for rk3588. Also add the pll_rk3588_ddr pll type that is used by the ppll clock. Changes since v5: - Use mandatory syscon lookup instead of optional grf phandle - Add pll_rk3588_ddr type to always have correct rate values Changes since v4: - Fix commit message with idx starting at 0 - Stash all bindings commits - Cleanup example and add me as maintainer Changes since v3: - Add missing include in bindings Changes since v2: - Renumber IDs from 0 - Commit clock header with clock bindings - Add missing resets on sub-cores - Add redundant fields in bindings Changes since v1: - Remove reset defines that are probably out of the main core - Separate resets and clocks bindings - Renumber the resets without gaps Detlev. Detlev Casanova (1): dt-bindings: clock, reset: Add support for rk3576 Elaine Zhang (2): clk: rockchip: Add new pll type pll_rk3588_ddr clk: rockchip: Add clock controller for the RK3576 .../bindings/clock/rockchip,rk3576-cru.yaml | 56 + drivers/clk/rockchip/Kconfig | 7 + drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk-pll.c | 6 +- drivers/clk/rockchip/clk-rk3576.c | 1829 +++++++++++++++++ drivers/clk/rockchip/clk.h | 54 + drivers/clk/rockchip/rst-rk3576.c | 652 ++++++ .../dt-bindings/clock/rockchip,rk3576-cru.h | 592 ++++++ .../dt-bindings/reset/rockchip,rk3576-cru.h | 564 +++++ 9 files changed, 3760 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3576-cru.yaml create mode 100644 drivers/clk/rockchip/clk-rk3576.c create mode 100644 drivers/clk/rockchip/rst-rk3576.c create mode 100644 include/dt-bindings/clock/rockchip,rk3576-cru.h create mode 100644 include/dt-bindings/reset/rockchip,rk3576-cru.h -- 2.46.0
