Re: [PATCH] arm64: dts: imx8mp-evk: Add native HDMI output

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Hi,

Am Donnerstag, 22. August 2024, 05:33:18 CEST schrieb Liu Ying:
> J17 on i.MX8mp EVK base board is a HDMI type A connector.
> It connects with i.MX8mp HDMI PHY.  Add support for it.
> 
> Signed-off-by: Liu Ying <victor.liu@xxxxxxx>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 46 ++++++++++++++++++++
>  1 file changed, 46 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index 938347704136..f118fe8ab5ac 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -56,6 +56,18 @@ memory@40000000 {
>  		      <0x1 0x00000000 0 0xc0000000>;
>  	};
>  
> +	native-hdmi-connector {

Is there a non-nativ HDMI connector? If not this is somewhat misleading.

> +		compatible = "hdmi-connector";
> +		label = "HDMI OUT";
> +		type = "a";
> +
> +		port {
> +			hdmi_out: endpoint {

That's an input port of the HDMI connector. It should be called hdmi_in or similar.
Right now it's connecting 'hdmi_out' and 'hdmi_tx_out' which looks confusing.

Best regards,
Alexander

> +				remote-endpoint = <&hdmi_tx_out>;
> +			};
> +		};
> +	};
> +
>  	pcie0_refclk: pcie0-refclk {
>  		compatible = "fixed-clock";
>  		#clock-cells = <0>;
> @@ -408,6 +420,28 @@ &flexcan2 {
>  	status = "disabled";/* can2 pin conflict with pdm */
>  };
>  
> +&hdmi_pvi {
> +	status = "okay";
> +};
> +
> +&hdmi_tx {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_hdmi>;
> +	status = "okay";
> +
> +	ports {
> +		port@1 {
> +			hdmi_tx_out: endpoint {
> +				remote-endpoint = <&hdmi_out>;
> +			};
> +		};
> +	};
> +};
> +
> +&hdmi_tx_phy {
> +	status = "okay";
> +};
> +
>  &i2c1 {
>  	clock-frequency = <400000>;
>  	pinctrl-names = "default";
> @@ -604,6 +638,10 @@ &lcdif1 {
>  	status = "okay";
>  };
>  
> +&lcdif3 {
> +	status = "okay";
> +};
> +
>  &micfil {
>  	#sound-dai-cells = <0>;
>  	pinctrl-names = "default";
> @@ -858,6 +896,14 @@ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16	0x140
>  		>;
>  	};
>  
> +	pinctrl_hdmi: hdmigrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x1c2
> +			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x1c2
> +			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x10
> +		>;
> +	};
> +
>  	pinctrl_hog: hoggrp {
>  		fsl,pins = <
>  			MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD		0x40000010
> 


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