There is a second HDMI connector on the baseboard which is routed to the DW HDMI bridge through the PVI to the LCDIF3 and requires the HDMI PHY to be enabled too. Signed-off-by: Adam Ford <aford173@xxxxxxxxx> --- V2: Fix Missing reg on hdmi_tx port@1 node. diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts index cc9b81d46188..31c33acb560c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts @@ -105,6 +105,17 @@ hdmi_con: endpoint { }; }; + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector: endpoint { + remote-endpoint = <&hdmi_to_connector>; + }; + }; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -282,6 +293,26 @@ usb-mux-hog { }; }; +&hdmi_tx { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi>; + status = "okay"; + + ports { + port@1 { + reg = <1>; + + hdmi_to_connector:endpoint { + remote-endpoint = <&hdmi_connector>; + }; + }; + }; +}; + +&hdmi_tx_phy { + status = "okay"; +}; + &i2c2 { clock-frequency = <384000>; pinctrl-names = "default"; @@ -344,6 +375,10 @@ pcieclk: clock-generator@68 { }; }; +&hdmi_pvi { + status = "okay"; +}; + &i2c3 { /* Connected to USB Hub */ usb-typec@52 { @@ -464,6 +499,10 @@ &lcdif1 { status = "okay"; }; +&lcdif3 { + status = "okay"; +}; + &micfil { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pdm>; @@ -646,6 +685,15 @@ MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140 >; }; + pinctrl_hdmi: hdmigrp { + fsl,pins = < + MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x400001c2 + MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x400001c2 + MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x40000010 + MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000010 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 -- 2.43.0