Re: [PATCH 1/3] dt-bindings: PCI: hisilicon,kirin-pcie: add top-level constraints

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On Sun, 18 Aug 2024 19:28:41 +0200, Krzysztof Kozlowski wrote:
> Properties with variable number of items per each device are expected to
> have widest constraints in top-level "properties:" block and further
> customized (narrowed) in "if:then:".  Add missing top-level constraints
> for clock-names and reset-names.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> ---
>  .../devicetree/bindings/pci/hisilicon,kirin-pcie.yaml          | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>





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