On Wed, 07 Aug 2024 14:07:22 +0300, Cristian Ciocaltea wrote:
> The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI
> 2.1 Quad-Pixel (QP) TX controller, which is a new IP block, quite
> different from those used in the previous generations of Rockchip SoCs.
>
> The controller supports the following features, among others:
>
> * Fixed Rate Link (FRL)
> * Display Stream Compression (DSC)
> * 4K@120Hz and 8K@60Hz video modes
> * Variable Refresh Rate (VRR) including Quick Media Switching (QMS)
> * Fast Vactive (FVA)
> * SCDC I2C DDC access
> * Multi-stream audio
> * Enhanced Audio Return Channel (EARC)
>
> [...]
Applied, thanks!
[4/5] drm/rockchip: Explicitly include bits header
commit: ab03974df27e471ff03402265292f1bafafb5df6
Best regards,
--
Heiko Stuebner <heiko@xxxxxxxxx>
