Am Dienstag, 13. August 2024, 18:38:58 CEST schrieb Krzysztof Kozlowski: > On 04/08/2024 16:05, Krzysztof Kozlowski wrote: > > On 04/08/2024 15:20, Yao Zi wrote: > >>> > >>>> + compatible = "fixed-clock"; > >>>> + #clock-cells = <0>; > >>>> + clock-frequency = <24000000>; > >>>> + clock-output-names = "xin24m"; > >>>> + }; > >>>> + > >>>> + gic: interrupt-controller@fed01000 { > >>> > >>> Why this all is outside of SoC? > >> > >> Just as Heiko says, device tree for all other Rockchip SoCs don't have > >> a "soc" node. I didn't know why before but just follow the style. > >> > >> If you prefer add a soc node, I am willing to. > > > > Surprising as usually we expect MMIO nodes being part of SoC to be under > > soc@, but if that's Rockchip preference then fine. > > One more comment, I forgot we actually have it documented long time ago: > > https://elixir.bootlin.com/linux/v6.11-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst#L90 Thanks for finding that block. I guess we'll follow that advice then and go with a soc node :-) . Heiko