The interrupt pin of the PHY is connected to the GPIO expander, configure it accordingly. Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx> --- Changes in v2: * Fix context (wrong local rebase) arch/arm64/boot/dts/freescale/mba8mx.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/mba8mx.dtsi b/arch/arm64/boot/dts/freescale/mba8mx.dtsi index 815241526a0d3..8d898506b3bce 100644 --- a/arch/arm64/boot/dts/freescale/mba8mx.dtsi +++ b/arch/arm64/boot/dts/freescale/mba8mx.dtsi @@ -185,6 +185,8 @@ ethphy0: ethernet-phy@e { reset-gpios = <&expander2 7 GPIO_ACTIVE_LOW>; reset-assert-us = <500000>; reset-deassert-us = <500>; + interrupt-parent = <&expander2>; + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; }; }; }; -- 2.34.1