Hi Prabhakar,
> -----Original Message-----
> From: Prabhakar <prabhakar.csengg@xxxxxxxxx>
> Sent: Sunday, August 11, 2024 9:50 PM
> Subject: [PATCH v2 6/8] arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Add WDT0-WDT3 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
> v1->v2
> - New patch
> ---
> arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> index 435b1f4e7d38..7f4e8ad9b0a5 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -184,6 +184,17 @@ scif: serial@11c01400 {
> status = "disabled";
> };
>
> + wdt0: watchdog@11c00400 {
> + compatible = "renesas,r9a09g057-wdt";
> + reg = <0 0x11c00400 0 0x400>;
> + clocks = <&cpg CPG_MOD 75>,
> + <&cpg CPG_MOD 76>;
> + clock-names = "pclk", "oscclk";
> + resets = <&cpg 117>;
> + power-domains = <&cpg>;
> + status = "disabled";
> + };
> +
> ostm4: timer@12c00000 {
> compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
> reg = <0x0 0x12c00000 0x0 0x1000>;
> @@ -224,6 +235,28 @@ ostm7: timer@12c03000 {
> status = "disabled";
> };
>
> + wdt2: watchdog@13000000 {
> + compatible = "renesas,r9a09g057-wdt";
> + reg = <0 0x13000000 0 0x400>;
> + clocks = <&cpg CPG_MOD 79>,
> + <&cpg CPG_MOD 80>;
> + clock-names = "pclk", "oscclk";
> + resets = <&cpg 119>;
> + power-domains = <&cpg>;
> + status = "disabled";
> + };
I guess same group(all wdt together) arranged together?? Not sure.
Cheers,
Biju
> +
> + wdt3: watchdog@13000400 {
> + compatible = "renesas,r9a09g057-wdt";
> + reg = <0 0x13000400 0 0x400>;
> + clocks = <&cpg CPG_MOD 81>,
> + <&cpg CPG_MOD 82>;
> + clock-names = "pclk", "oscclk";
> + resets = <&cpg 120>;
> + power-domains = <&cpg>;
> + status = "disabled";
> + };
> +
> ostm2: timer@14000000 {
> compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
> reg = <0x0 0x14000000 0x0 0x1000>;
> @@ -244,6 +277,17 @@ ostm3: timer@14001000 {
> status = "disabled";
> };
>
> + wdt1: watchdog@14400000 {
> + compatible = "renesas,r9a09g057-wdt";
> + reg = <0 0x14400000 0 0x400>;
> + clocks = <&cpg CPG_MOD 77>,
> + <&cpg CPG_MOD 78>;
> + clock-names = "pclk", "oscclk";
> + resets = <&cpg 118>;
> + power-domains = <&cpg>;
> + status = "disabled";
> + };
> +
> i2c0: i2c@14400400 {
> #address-cells = <1>;
> #size-cells = <0>;
> --
> 2.34.1
