Hi, Angelo:
On Tue, 2024-06-18 at 12:17 +0200, AngeloGioacchino Del Regno wrote:
> The display IPs in MediaTek SoCs support being interconnected with
> different instances of DDP IPs (for example, merge0 or merge1) and/or
> with different DDP IPs (for example, rdma can be connected with either
> color, dpi, dsi, merge, etc), forming a full Display Data Path that
> ends with an actual display.
>
> The final display pipeline is effectively board specific, as it does
> depend on the display that is attached to it, and eventually on the
> sensors supported by the board (for example, Adaptive Ambient Light
> would need an Ambient Light Sensor, otherwise it's pointless!), other
> than the output type.
>
> Add support for OF graphs to most of the MediaTek DDP (display) bindings
> to add flexibility to build custom hardware paths, hence enabling board
> specific configuration of the display pipeline and allowing to finally
> migrate away from using hardcoded paths.
>
> Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
> Reviewed-by: Alexandre Mergnat <amergnat@xxxxxxxxxxxx>
> Tested-by: Alexandre Mergnat <amergnat@xxxxxxxxxxxx>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
> ---
[snip]
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
> index 677882348ede..98db47894eeb 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml
> @@ -110,6 +110,28 @@ properties:
> include/dt-bindings/gce/<chip>-gce.h, mapping to the register of display
> function block.
>
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + description:
> + Input and output ports can have multiple endpoints, each of those
> + connects to either the primary, secondary, etc, display pipeline.
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: ETHDR input, usually from one of the MERGE blocks.
Sorry, I find one question now.
I think ETHDR may have multiple input, and ETHDR receive data from all input at the same time.
Why here has only one input port?
MERGE -->+-----------------+
| |
MERGE -->| |
| ETHDR |
MERGE -->| |
| |
MERGE -->+-----------------+
Regards,
CK
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description:
> + ETHDR output to the input of the next desired component in the
> + display pipeline, for example one of the available MERGE blocks,
> + or others.
> +
> + required:
> + - port@0
> + - port@1
> +
> required:
> - compatible
> - reg
>
