On Tue, 2024-08-06 at 11:29 -0600, Rob Herring wrote: > On Fri, Aug 02, 2024 at 03:06:31PM +0930, Andrew Jeffery wrote: > > Address warnings such as: > > > > arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: interrupt-controller@1e6c0080: 'valid-sources' does not match any of the regexes: 'pinctrl-[0-9]+' > > > > and > > > > arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: /ahb/copro-interrupt-controller@1e6c2000: failed to match any schema with compatible: ['aspeed,ast2400-cvic', 'aspeed-cvic'] > > > > Note that the conversion to DT schema causes some further warnings to > > be emitted, because the Aspeed devicetrees are not in great shape. These > > new warnings are resolved in a separate series: > > > > https://lore.kernel.org/lkml/20240802-dt-warnings-bmc-dts-cleanups-v1-0-1cb1378e5fcd@xxxxxxxxxxxxxxxxxxxx/ > > > > Signed-off-by: Andrew Jeffery <andrew@xxxxxxxxxxxxxxxxxxxx> > > --- > > .../bindings/misc/aspeed,ast2400-cvic.yaml | 60 ++++++++++++++++++++++ > > .../devicetree/bindings/misc/aspeed,cvic.txt | 35 ------------- > > 2 files changed, 60 insertions(+), 35 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/misc/aspeed,ast2400-cvic.yaml b/Documentation/devicetree/bindings/misc/aspeed,ast2400-cvic.yaml > > new file mode 100644 > > index 000000000000..3c85b4924c05 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/misc/aspeed,ast2400-cvic.yaml > > @@ -0,0 +1,60 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/misc/aspeed,ast2400-cvic.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Aspeed Coprocessor Vectored Interrupt Controller > > + > > +maintainers: > > + - Andrew Jeffery <andrew@xxxxxxxxxxxxxxxxxxxx> > > + > > +description: > > + The Aspeed AST2400 and AST2500 SoCs have a controller that provides interrupts > > + to the ColdFire coprocessor. It's not a normal interrupt controller and it > > + would be rather inconvenient to create an interrupt tree for it, as it > > + somewhat shares some of the same sources as the main ARM interrupt controller > > + but with different numbers. > > + > > + The AST2500 also supports a software generated interrupt. > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - aspeed,ast2400-cvic > > + - aspeed,ast2500-cvic > > + - const: aspeed,cvic > > + > > + reg: > > + maxItems: 1 > > + > > + valid-sources: > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > + description: > > + One cell, bitmap of support sources for the implementation. > > + > > + copro-sw-interrupts: > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > + description: > > + A list of interrupt numbers that can be used as software interrupts from > > + the ARM to the coprocessor. > > + > > +required: > > + - compatible > > + - reg > > + - valid-sources > > + > > +allOf: > > + - $ref: /schemas/interrupt-controller.yaml# > > Doesn't really look like this schema applies to this binding. Drop the > ref. > Ack. Thanks for the review. Andrew >
