From: Haowei Zheng <zhenghaowei@xxxxxxxxxxx> Add Loongson UART controller binding with DT schema format using json-schema. Signed-off-by: Haowei Zheng <zhenghaowei@xxxxxxxxxxx> --- .../bindings/serial/loongson,ls7a-uart.yaml | 74 +++++++++++++++++++ MAINTAINERS | 7 ++ 2 files changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/loongson,ls7a-uart.yaml diff --git a/Documentation/devicetree/bindings/serial/loongson,ls7a-uart.yaml b/Documentation/devicetree/bindings/serial/loongson,ls7a-uart.yaml new file mode 100644 index 000000000000..22d9cca5569e --- /dev/null +++ b/Documentation/devicetree/bindings/serial/loongson,ls7a-uart.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/loongson,ls7a-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson UART + +maintainers: + - Haowei Zheng <zhenghaowei@xxxxxxxxxxx> + +properties: + compatible: + const: loongson,ls7a-uart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + fractional-division: + description: Enables fractional-N division. Currently, + only LS2K1500 and LS2K2000 support this feature. + + rts-invert: + description: Inverts the RTS value in the MCR register. + This should be used on Loongson-3 series CPUs, Loongson-2K + series CPUs, and Loongson LS7A bridge chips. + + dtr-invert: + description: Inverts the DTR value in the MCR register. + This should be used on Loongson-3 series CPUs, Loongson-2K + series CPUs, and Loongson LS7A bridge chips. + + cts-invert: + description: Inverts the CTS value in the MSR register. + This should be used on Loongson-2K0500, Loongson-2K1000, + and Loongson LS7A bridge chips. + + dsr-invert: + description: Inverts the DSR value in the MSR register. + This should be used on Loongson-2K0500, Loongson-2K1000, + and Loongson LS7A bridge chips. + +required: + - compatible + - reg + - interrupts + - clocks + +allOf: + - $ref: serial.yaml + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/loongson,ls2k-clk.h> + + serial@1fe001e0 { + compatible = "loongson,ls7a-uart"; + reg = <0x0 0x1fe001e0 0x0 0x10>; + clock-frequency = <100000000>; + interrupt-parent = <&liointc>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + fractional-division; + rts-invert; + dtr-invert; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 8766f3e5e87e..a6306327dba5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13189,6 +13189,13 @@ S: Maintained F: Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml F: drivers/i2c/busses/i2c-ls2x.c +LOONGSON UART DRIVER +M: Haowei Zheng <zhenghaowei@xxxxxxxxxxx> +L: linux-serial@xxxxxxxxxxxxxxx +S: Maintained +F: Documentation/devicetree/bindings/serial/loongson,ls7a-uart.yaml +F: drivers/tty/serial/8250/8250_loongson.c + LOONGSON-2 SOC SERIES CLOCK DRIVER M: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx> L: linux-clk@xxxxxxxxxxxxxxx -- 2.43.0
