Re: [PATCH v3 2/2] phy: nuvoton: add new driver for the Nuvoton MA35 SoC USB 2.0 PHY

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Dear Krzysztof,

Thank you for your reply.



On 2024/8/1 下午 10:43, Krzysztof Kozlowski wrote:
On 01/08/2024 07:37, Hui-Ping Chen wrote:
+	struct regmap *sysreg;
Look here - iomem? No.

Yes, this is my mistake.



+};
+
+static int ma35_usb_phy_power_on(struct phy *phy)
+{
+	struct ma35_usb_phy *p_phy = phy_get_drvdata(phy);
+	unsigned int val;
+	int ret;
+
+	ret = clk_prepare_enable(p_phy->clk);
+	if (ret < 0) {
+		dev_err(p_phy->dev, "Failed to enable PHY clock: %d\n", ret);
+		return ret;
+	}
+
+	regmap_read(p_phy->sysreg, MA35_SYS_REG_USBPMISCR, &val);
+	if (val & PHY0SUSPEND) {
+		/*
+		 * USB PHY0 is in operation mode already
+		 * make sure USB PHY 60 MHz UTMI Interface Clock ready
+		 */
+		ret = readl_poll_timeout((void __iomem *)p_phy->sysreg + MA35_SYS_REG_USBPMISCR,
Eh, I responded to v2, not here, so repeating:

sysreg is a regmap, not io address. How could it possibly work and be
tested?!? This cannot work. Test your code *before* sending it.

Yes, this is my mistake. I won't reply to v2. I will reply here.


I would change 'readl_poll_timeout' to 'regmap_read_poll_timeout'.

And it has been tested OK on our platform.



Best regards,
Krzysztof


Best regards,

Hui-Ping Chen






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