On 31/07/2024 14:24, Thomas Bonnefille wrote:
> Adds SARADC nodes for the common Successive Approximation Analog to
> Digital Converter used in Sophgo CV18xx series SoC.
> This patch adds two nodes for the two controllers the board, one in
> the Active domain and the other in the No-Die domain.
>
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@xxxxxxxxxxx>
> ---
> arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 891932ae470f..e6c1a84d3e55 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -133,6 +133,14 @@ portd: gpio-controller@0 {
> };
> };
>
> + saradc: adc@30f0000 {
> + compatible = "sophgo,cv1800b-saradc";
> + clocks = <&clk CLK_SARADC>;
> + interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
> + reg = <0x030F0000 0x1000>;
Please read carefully DTS coding style.
Best regards,
Krzysztof
