On Wed, 31 Jul 2024 11:44:07 +0800, Chen-Yu Tsai wrote:
> This series fixes and cleans up the representation of xhci1, whether
> used in USB 2.0 only or USB 2.0 + 3.0 designs. This work is a result
> of discussions from the original Kernel CI report [1] on xhci1 failing
> to probe, and subsequent patches [2][3].
>
> Patch 1 explicitly disables USB 3.0 on the Cherry design. The super
> speed pairs are used for PCIe instead.
>
> [...]
Applied to v6.11-next/dts64, thanks!
[1/3] arm64: dts: mediatek: mt8195-cherry: Mark USB 3.0 on xhci1 as disabled
commit: 09d385679487c58f0859c1ad4f404ba3df2f8830
[2/3] arm64: dts: mediatek: mt8395-nio-12l: Mark USB 3.0 on xhci1 as disabled
commit: be985531a5dd9ca50fc9f3f85b8adeb2a4a75a58
[3/3] arm64: dts: mediatek: mt8195: Assign USB 3.0 PHY to xhci1 by default
commit: fe035fa6f56c5b8146fcfe4253edbb9e9399ce2d
Cheers,
Angelo
