On 29/07/2024 11:50, Antoniu Miclaus wrote: > Add support for ADF4378 high performance, ultra-low jitter, integer-N > phased locked loop (PLL) with an integrated voltage controlled > oscillator (VCO) and system reference (SYSREF) retimer ideally > suited for data converter and mixed signal front end (MxFE) clock > applications. > > The main difference between ADF4377 and ADF4378 is that the second one > provides only one output frequency channel which is enable/disabled via > one GPIO. > > Both the driver and the bindings are updated to reflect that difference. That's a v3, but where is the changelog? Best regards, Krzysztof
