Hi,
This series add support for the QUICC Engine (QE) version of TSA and QMC
components.
CPM1 version is already supported and, as the QE version of those
component are pretty similar to the CPM1 version, the series extend
the already existing drivers to support for the QE version.
The TSA and QMC components are tightly coupled and so the series
provides modifications on both components.
Of course, this series can be split if it is needed. Let me know.
The series is composed of:
- Patches 1 and 2: Fixes related to TRNSYNC in the QMC driver
- Patches 3..6: Fixes of checkpatch detected issues in the TSA driver
- Patch 7: The QE TSA device-tree binding
- Patches 8..13: TSA driver preparations for adding support for QE
- Patches 14 and 15: The support for QE in TSA + MAINTAINERS update
- Patch 16: A TSA API improvement needed for the QE QMC driver
- Patch 17: A clarification in the QE QMC driver
- Patches 18..22: Fixes of checkpatch detected issues in the QMC driver
- Patch 23: The QE QMC device-tree binding
- Patches 24..31: QMC driver preparations for adding support for QE
- Patches 32 and 33: Missing features additions in QE code
- Patches 34..36: The QMC support for QE in QMC + MAINTAINERS update
Best regards,
Hervé
Herve Codina (36):
soc: fsl: cpm1: qmc: Update TRNSYNC only in transparent mode
soc: fsl: cpm1: qmc: Enable TRNSYNC only when needed
soc: fsl: cpm1: tsa: Fix tsa_write8()
soc: fsl: cpm1: tsa: Use BIT(), GENMASK() and FIELD_PREP() macros
soc: fsl: cpm1: tsa: Fix blank line and spaces
soc: fsl: cpm1: tsa: Add missing spinlock comment
dt-bindings: soc: fsl: cpm_qe: Add QUICC Engine (QE) TSA controller
soc: fsl: cpm1: tsa: Remove unused registers offset definition
soc: fsl: cpm1: tsa: Use ARRAY_SIZE() instead of hardcoded integer
values
soc: fsl: cpm1: tsa: Make SIRAM entries specific to CPM1
soc: fsl: cpm1: tsa: Introduce tsa_setup() and its CPM1 compatible
version
soc: fsl: cpm1: tsa: Isolate specific CPM1 part from
tsa_serial_{dis}connect()
soc: fsl: cpm1: tsa: Introduce tsa_version
soc: fsl: cpm1: tsa: Add support for QUICC Engine (QE) implementation
MAINTAINERS: Add QE files related to the Freescale TSA controller
soc: fsl: cpm1: tsa: Introduce tsa_serial_get_num()
soc: fsl: cpm1: qmc: Rename QMC_TSA_MASK
soc: fsl: cpm1: qmc: Use BIT(), GENMASK() and FIELD_PREP() macros
soc: fsl: cpm1: qmc: Fix blank line and spaces
soc: fsl: cpm1: qmc: Remove unneeded parenthesis
soc: fsl: cpm1: qmc: Fix 'transmiter' typo
soc: fsl: cpm1: qmc: Add missing spinlock comment
dt-bindings: soc: fsl: cpm_qe: Add QUICC Engine (QE) QMC controller
soc: fsl: cpm1: qmc: Introduce qmc_data structure
soc: fsl: cpm1: qmc: Re-order probe() operations
soc: fsl: cpm1: qmc: Introduce qmc_init_resource() and its CPM1
version
soc: fsl: cpm1: qmc: Introduce qmc_{init,exit}_xcc() and their CPM1
version
soc: fsl: cpm1: qmc: Rename qmc_chan_command()
soc: fsl: cpm1: qmc: Handle RPACK initialization
soc: fsl: cpm1: qmc: Rename SCC_GSMRL_MODE_QMC
soc: fsl: cpm1: qmc: Introduce qmc_version
soc: fsl: qe: Add resource-managed muram allocators
soc: fsl: qe: Add missing PUSHSCHED command
soc: fsl: cpm1: qmc: Add support for QUICC Engine (QE) implementation
soc: fsl: cpm1: qmc: Handle QUICC Engine (QE) soft-qmc firmware
MAINTAINERS: Add QE files related to the Freescale QMC controller
.../bindings/soc/fsl/cpm_qe/fsl,qe-tsa.yaml | 212 ++++++
.../soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml | 197 ++++++
MAINTAINERS | 3 +
drivers/soc/fsl/qe/Kconfig | 18 +-
drivers/soc/fsl/qe/qe_common.c | 79 +++
drivers/soc/fsl/qe/qmc.c | 667 +++++++++++++-----
drivers/soc/fsl/qe/tsa.c | 659 ++++++++++++-----
drivers/soc/fsl/qe/tsa.h | 3 +
include/dt-bindings/soc/qe-fsl,tsa.h | 13 +
include/soc/fsl/qe/qe.h | 23 +-
10 files changed, 1550 insertions(+), 324 deletions(-)
create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-tsa.yaml
create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml
create mode 100644 include/dt-bindings/soc/qe-fsl,tsa.h
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2.45.0
