On 6 March 2015 at 11:19, Pi-Cheng Chen <pi-cheng.chen@xxxxxxxxxx> wrote: > On 5 March 2015 at 17:55, Viresh Kumar <viresh.kumar@xxxxxxxxxx> wrote: > About putting > those stuff into regulator driver, I think you mean creating a > "virtual regulator > device" and put all the voltage controlling complex into the driver, right? > Maybe it's a good idea in this case, but I am sure if this kind of > virtual regulator is acceptable. @Mark: Is this allowed to create virtual regulator for a CPU ? > And the flexibility might be an issue, since we might > use different > PMIC for same SoC on different board. We can talk about that separately once Mark replies to my query. > Combining comments and suggestions from you and Sascha[1], I conclude some > architectural changes are going to be made in the next version: > > 1. Use set_rate hook instead of determine_rate in clk driver, and > switch to intermeidate > PLL parent and back to original CPU PLL parent explicitly in set_rate Lets wait for Russell's answer to the query I posted before making any progress here. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
