Re: [RFC PATCH v3 09/37] dt-bindings: Add binding for kalray,kv3-1-timer

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On Mon, Jul 22, 2024 at 11:41:20AM +0200, ysionneau@xxxxxxxxxxxxx wrote:
> From: Yann Sionneau <ysionneau@xxxxxxxxxxxxx>
> 
> Add binding for Kalray kv3-1 core timer.
> 
> Signed-off-by: Yann Sionneau <ysionneau@xxxxxxxxxxxxx>
> ---
> 
> Notes:
> 
> V2 -> V3: New patch
> ---
>  .../bindings/timer/kalray,kv3-1-timer.yaml    | 57 +++++++++++++++++++
>  1 file changed, 57 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/kalray,kv3-1-timer.yaml
> 
> diff --git a/Documentation/devicetree/bindings/timer/kalray,kv3-1-timer.yaml b/Documentation/devicetree/bindings/timer/kalray,kv3-1-timer.yaml
> new file mode 100644
> index 0000000000000..1932f28a05a18
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/kalray,kv3-1-timer.yaml
> @@ -0,0 +1,57 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/kalray,kv3-1-timer.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Kalray kv3-1 core timer
> +
> +maintainers:
> +  - Jonathan Borne <jborne@xxxxxxxxxxxxx>
> +  - Julian Vetter <jvetter@xxxxxxxxxxxxx>
> +  - Yann Sionneau <ysionneau@xxxxxxxxxxxxx>
> +
> +description: |

Don't need '|' if no formatting.

> +  Timer tightly coupled to the kv3-1 processor core. It is configured via core SFR.
> +  It triggers an interrupt directly on core-intc.
> +
> +properties:
> +  compatible:
> +    const: kalray,kv3-1-timer
> +
> +  interrupts-extended:
> +    maxItems: 16

I assume this is 1 interrupt per core, but I shouldn't have to assume 
that.

Only 16 cores supported?

> +
> +  clocks:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - interrupts-extended
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    core_timer {
> +        compatible = "kalray,kv3-1-timer";
> +        clocks = <&core_clk>;
> +        interrupts-extended = <&core_intc0 0>,
> +                              <&core_intc1 0>,
> +                              <&core_intc2 0>,
> +                              <&core_intc3 0>,
> +                              <&core_intc4 0>,
> +                              <&core_intc5 0>,
> +                              <&core_intc6 0>,
> +                              <&core_intc7 0>,
> +                              <&core_intc8 0>,
> +                              <&core_intc9 0>,
> +                              <&core_intc10 0>,
> +                              <&core_intc11 0>,
> +                              <&core_intc12 0>,
> +                              <&core_intc13 0>,
> +                              <&core_intc14 0>,
> +                              <&core_intc15 0>;
> +    };
> +
> -- 
> 2.45.2
> 
> 
> 
> 
> 




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