RE: [PATCH V1 resend 0/6] Document r8a774a3 SoC bindings

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Hi Conor,

Thank you for the comment.

> -----Original Message-----
> From: Conor Dooley <conor@xxxxxxxxxx>
> Sent: Tuesday, July 23, 2024 3:05 PM
> To: Oliver Rhodes <oliver.rhodes.aj@xxxxxxxxxxx>
> Cc: Rob Herring <robh@xxxxxxxxxx>; Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx>; Conor Dooley
> <conor+dt@xxxxxxxxxx>; Geert Uytterhoeven <geert+renesas@xxxxxxxxx>; Magnus Damm
> <magnus.damm@xxxxxxxxx>; linux-renesas-soc@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx
> Subject: Re: [PATCH V1 resend 0/6] Document r8a774a3 SoC bindings
>
> On Tue, Jul 23, 2024 at 12:07:27PM +0100, Oliver Rhodes wrote:
> > Hi all,
> >
> > This patch series updates the renesas DT bindings documentation for
> > core components (SoC, SYSC, reset, clk, pinctrl, scif) on the RZ/G2M v3.0 (R8A774A3) SoC.
> > This SoC is similar to R-CAR M3-W+ (R8A77961) SoC.
>
> Your commit messages for any binding without a fallback compatible need to mention why this device is
> not compatible with the !v3.0 SoC.

For SoC identification, it is a different SoC altogether, so we need to use a dedicated compatible.
For SYSC, it lacks the A2VC power area compared to the RZ/G2M v1.X so we cannot use family compatible.
Similarly for clock, it lacks some modules such as the FCPCI, so we need to use a dedicated compatible.

R-CAR M3-W (r8a77960) is similar to RZ/G2M (r8a774a1) and R-CAR M3-W+ (r8a77961) is similar to RZ/G2M v3.0(r8a774a3).
So, I referred R-CAR M3-W+ bindings and made similar changes for this SoC.

I will update the commit messages for SoC, SYSC and clk to reflect this.

Thank you,
Oliver
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