On 07/23/2024, Rob Herring wrote: > On Fri, Jul 12, 2024 at 05:32:29PM +0800, Liu Ying wrote: >> i.MX8qxp Display Controller display engine consists of all processing units >> that operate in a display clock domain. >> >> Signed-off-by: Liu Ying <victor.liu@xxxxxxx> >> --- >> v2: >> * Drop fsl,dc-*-id DT properties. (Krzysztof) >> * Drop port property. (Krzysztof) >> * Fix register range sizes in example. >> >> .../imx/fsl,imx8qxp-dc-display-engine.yaml | 152 ++++++++++++++++++ >> 1 file changed, 152 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml >> >> diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml >> new file mode 100644 >> index 000000000000..91f3bb77d8d0 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml >> @@ -0,0 +1,152 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-display-engine.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Freescale i.MX8qxp Display Controller Display Engine >> + >> +description: >> + All Processing Units that operate in a display clock domain. Pixel pipeline >> + is driven by a video timing and cannot be stalled. Implements all display >> + specific processing. >> + >> +maintainers: >> + - Liu Ying <victor.liu@xxxxxxx> >> + >> +properties: >> + compatible: >> + const: fsl,imx8qxp-dc-display-engine >> + >> + reg: >> + maxItems: 2 >> + >> + reg-names: >> + items: >> + - const: top >> + - const: cfg >> + >> + resets: >> + maxItems: 1 >> + >> + interrupts: >> + maxItems: 3 >> + >> + interrupt-names: >> + items: >> + - const: shdload >> + - const: framecomplete >> + - const: seqcomplete >> + >> + power-domains: >> + maxItems: 1 >> + >> + "#address-cells": >> + const: 1 >> + >> + "#size-cells": >> + const: 1 >> + >> + ranges: true >> + >> +patternProperties: >> + "^dither@[0-9a-f]+$": >> + type: object >> + additionalProperties: true >> + >> + properties: >> + compatible: >> + const: fsl,imx8qxp-dc-dither > > Doesn't look like this and some other compatibles are fully documented. > They need to be. Will document all processing units, command sequencer, axi performance counter and blit engine in v3 if no objections. > > Rob -- Regards, Liu Ying
