On Mon, Mar 9, 2015 at 8:24 AM, Matt Porter <mporter@xxxxxxxxxxxx> wrote:
> The imx-pwm binding contains language indicating compatible
> strings to be used that is not valid for all supported parts
> e.g. Should be "fsl,<soc>-pwm". Fix this by enumerating the
> valid compatible strings that represent the two versions of
> this peripheral in use.
>
> The binding is also missing the clocks/clock-names properties
> so document these,the two required ipg and per clocks, and add
> add these properties to the example.
>
> Signed-off-by: Matt Porter <mporter@xxxxxxxxxxxx>
Acked-by: Rob Herring <robh@xxxxxxxxxx>
> ---
> Changes since v1:
> - compatible strings include the actual soc and one of the two specific
> compatible parts.
>
> Documentation/devicetree/bindings/pwm/imx-pwm.txt | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.txt b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
> index b50d7a6d..e00c2e9 100644
> --- a/Documentation/devicetree/bindings/pwm/imx-pwm.txt
> +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.txt
> @@ -1,10 +1,17 @@
> Freescale i.MX PWM controller
>
> Required properties:
> -- compatible: should be "fsl,<soc>-pwm"
> +- compatible : should be "fsl,<soc>-pwm" and one of the following
> + compatible strings:
> + - "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1
> + - "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27
> - reg: physical base address and length of the controller's registers
> - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
> the cells format.
> +- clocks : Clock specifiers for both ipg and per clocks.
> +- clock-names : Clock names should include both "ipg" and "per"
> +See the clock consumer binding,
> + Documentation/devicetree/bindings/clock/clock-bindings.txt
> - interrupts: The interrupt for the pwm controller
>
> Example:
> @@ -13,5 +20,8 @@ pwm1: pwm@53fb4000 {
> #pwm-cells = <2>;
> compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
> reg = <0x53fb4000 0x4000>;
> + clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
> + <&clks IMX5_CLK_PWM1_HF_GATE>;
> + clock-names = "ipg", "per";
> interrupts = <61>;
> };
> --
> 1.8.4
>
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