Hi Thomas, Thank you for the comments! On 6/27/24 15:12, Thomas Gleixner wrote: > Stanimir! > > On Wed, Jun 26 2024 at 13:45, Stanimir Varbanov wrote: >> Add an interrupt controller driver for MSI-X Interrupt Peripheral (MIP) >> hardware block found in bcm2712. The interrupt controller is used to >> handle MSI-X interrupts from peripherials behind PCIe endpoints like >> RP1 south bridge found in RPi5. >> >> There are two MIPs on bcm2712, the first has 64 consecutive SPIs >> assigned to 64 output vectors, and the second has 17 SPIs, but only >> 8 of them are consecutive starting at the 8th output vector. > > This is going to conflict with: > > https://lore.kernel.org/all/20240623142137.448898081@xxxxxxxxxxxxx/ > > git://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git devmsi-arm-v4-1 > > Can you please have a look and rework it to the new per device MSI > domain concept? When do you expect this will be merged? ~Stan
