RE: [PATCH v2 3/4] clk: imx95: enable the clock of NETCMIX block control

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



> -----Original Message-----
> From: Peng Fan <peng.fan@xxxxxxx>
> Sent: 2024年7月18日 15:35
> To: Wei Fang <wei.fang@xxxxxxx>; mturquette@xxxxxxxxxxxx;
> sboyd@xxxxxxxxxx; robh@xxxxxxxxxx; conor+dt@xxxxxxxxxx;
> shawnguo@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx; festevam@xxxxxxxxx;
> abelvesa@xxxxxxxxxx
> Cc: linux-clk@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx;
> imx@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> linux-kernel@xxxxxxxxxxxxxxx
> Subject: RE: [PATCH v2 3/4] clk: imx95: enable the clock of NETCMIX block
> control
> 
> > Subject: [PATCH v2 3/4] clk: imx95: enable the clock of NETCMIX block
> > control
> >
> > The NETCMIX block control consists of registers for configuration of
> > peripherals in the NETC domain, so enable the clock of NETCMIX to
> > support the configuration.
> >
> > Signed-off-by: Wei Fang <wei.fang@xxxxxxx>
> > ---
> > V2:
> > Add RMII reference clock mux for ENETC0 and ENETC1.
> > ---
> >  drivers/clk/imx/clk-imx95-blk-ctl.c | 30
> > +++++++++++++++++++++++++++++
> >  1 file changed, 30 insertions(+)
> >
> > diff --git a/drivers/clk/imx/clk-imx95-blk-ctl.c
> > b/drivers/clk/imx/clk- imx95-blk-ctl.c index
> > 74f595f9e5e3..19a62da74be4 100644
> > --- a/drivers/clk/imx/clk-imx95-blk-ctl.c
> > +++ b/drivers/clk/imx/clk-imx95-blk-ctl.c
> > @@ -248,6 +248,35 @@ static const struct imx95_blk_ctl_dev_data
> > dispmix_csr_dev_data = {
> >  	.clk_reg_offset = 0,
> >  };
> >
> > +static const struct imx95_blk_ctl_clk_dev_data
> > netxmix_clk_dev_data[] = {
> > +	[IMX95_CLK_NETCMIX_ENETC0_RMII] = {
> > +		.name = "enetc0_rmii_sel",
> > +		.parent_names = (const char *[]){"ext_enetref",
> > "enetref"},
> > +		.num_parents = 2,
> > +		.reg = 4,
> > +		.bit_idx = 5,
> > +		.bit_width = 1,
> > +		.type = CLK_MUX,
> > +		.flags = CLK_SET_RATE_NO_REPARENT |
> > CLK_SET_RATE_PARENT,
> > +	},
> > +	[IMX95_CLK_NETCMIX_ENETC1_RMII] = {
> > +		.name = "enetc1_rmii_sel",
> > +		.parent_names = (const char *[]){"ext_enetref",
> > "enetref"},
> > +		.num_parents = 2,
> > +		.reg = 4,
> 
> Both the entry use reg address 4, use a lock to protect?
> 

I think there is already a lock (bc->lock) to protect it, right?
if (data->type == CLK_MUX) {
			hws[i] = clk_hw_register_mux(dev, data->name, data->parent_names,
					data->num_parents, data->flags, reg,
					data->bit_idx, data->bit_width,
					data->flags2, &bc->lock);
}

Or did I misunderstand the usage of bc->lock?




[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux