From: Yelian Wang <yelian.wang@xxxxxxxxxxxx> Add YAML device tree binding for MT8188 AIE. Signed-off-by: Yelian Wang <yelian.wang@xxxxxxxxxxxx> --- .../bindings/media/mediatek-aie.yaml | 99 +++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek-aie.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek-aie.yaml b/Documentation/devicetree/bindings/media/mediatek-aie.yaml new file mode 100644 index 000000000000..300aef43e02b --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-aie.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek-aie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: The AIE Unit of MediaTek Camera System + +maintainers: + - Yelian Wang <yelian.wang@xxxxxxxxxxxx> + +description: + MediaTek AIE is the ISP unit in MediaTek SoC. + +properties: + compatible: + items: + - const: mediatek,mt8188-aie + - enum: + - mediatek,aie-hw3.1 + - mediatek,aie-hw3.0 + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + reg: + maxItems: 2 + + interrupts: + maxItems: 1 + + mediatek,larb: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Must contain the local arbiters in the current SoCs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml + for details. + + iommus: + maxItems: 4 + description: + Points to the respective IOMMU block with master port as argument, see + Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. + Ports are according to the HW. + + power-domains: + maxItems: 1 + + clocks: + maxItems: 4 + minItems: 4 + + clock-names: + items: + - const: IMG_IPE + - const: IPE_FDVT + - const: IPE_SMI_LARB12 + - const: IPE_TOP + +required: + - compatible + - reg + - interrupts + - iommus + - power-domains + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/memory/mediatek,mt8188-memory-port.h> + #include <dt-bindings/power/mediatek,mt8188-power.h> + #include <dt-bindings/clock/mediatek,mt8188-clk.h> + aie: aie@15310000 { + compatible = "mediatek,mt8188-aie", "mediatek,aie-hw3.1"; + reg = <0 0x15310000 0 0x1000>; + interrupts = <GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH 0>; + mediatek,larb = <&larb12>; + iommus = <&vpp_iommu M4U_PORT_L12_FDVT_RDA_0>, + <&vpp_iommu M4U_PORT_L12_FDVT_RDB_0>, + <&vpp_iommu M4U_PORT_L12_FDVT_WRA_0>, + <&vpp_iommu M4U_PORT_L12_FDVT_WRB_0>; + power-domains = <&spm MT8188_POWER_DOMAIN_IPE>; + clocks = <&imgsys CLK_IMGSYS_MAIN_IPE>, + <&ipesys CLK_IPE_FDVT>, + <&ipesys CLK_IPE_SMI_LARB12>, + <&ipesys CLK_IPESYS_TOP>; + clock-names = "IMG_IPE", + "IPE_FDVT", + "IPE_SMI_LARB12", + "IPE_TOP"; + }; -- 2.34.1
