On Wed, 17 Jul 2024 at 00:13, Dmitry Baryshkov
<dmitry.baryshkov@xxxxxxxxxx> wrote:
>
> The display clock controller indices for SM8650 and SM8550 are
> completely equal. Replace the header file for qcom,sm8650-dispcc with
> the symlink to the qcom,sm8550-dispcc header file.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> ---
> drivers/clk/qcom/dispcc-sm8550.c | 2 +-
> include/dt-bindings/clock/qcom,sm8650-dispcc.h | 103 +------------------------
> 2 files changed, 2 insertions(+), 103 deletions(-)
>
> diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8550.c
> index 78e11eade2ea..9ffcd9eb9283 100644
> --- a/drivers/clk/qcom/dispcc-sm8550.c
> +++ b/drivers/clk/qcom/dispcc-sm8550.c
> @@ -1776,7 +1776,7 @@ static int disp_cc_sm8550_probe(struct platform_device *pdev)
> }
>
> if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8650-dispcc")) {
> - lucid_ole_vco.max_freq = 2100000000;
> + lucid_ole_vco[0].max_freq = 2100000000;
> disp_cc_mdss_mdp_clk_src.freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src_sm8650;
> }
>
Of course this chunk should have been a part of the previous patch.
I'll fix it for v2.
--
With best wishes
Dmitry
