On 2024/7/11 18:01, Thomas Bonnefille wrote:
The LicheeRV Nano is a RISC-V SBC based on the Sophgo SG2002 chip. Adds
minimal device tree files for this board to make it boot to a basic
shell.
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@xxxxxxxxxxx>
---
Changes in v4:
- Add correct bindings configuration for SG2002 sdhci
- Drop commit "dt-bindings: timer: Add SOPHGO SG2002 clint" because it
has already been merged in Daniel Lezcano git tree.
- Link to v3: https://lore.kernel.org/r/20240709-sg2002-v3-0-af779c3d139d@xxxxxxxxxxx
Changes in v3:
- Remove /dts-v1/ directive from sg2002.dtsi file
- Add disable-wp property to sdhci node to avoid having a write
protected SD card
- Drop changes in cv18xx.dtsi and cv1800b.dtsi
- Add fallback compatible to cv1800b in SDHCI node of sg2002.dtsi
- Link to v2: https://lore.kernel.org/r/20240612-sg2002-v2-0-19a585af6846@xxxxxxxxxxx
Changes in v2:
- Add SDHCI support
- Change device tree name to match the Makefile
- Add oscillator frequency
- Add aliases to other UARTs
- Add aliases to GPIOs
- Move compatible for SDHCI from common DT to specific DT
- Link to v1: https://lore.kernel.org/r/20240527-sg2002-v1-0-1b6cb38ce8f4@xxxxxxxxxxx
---
Thomas Bonnefille (4):
dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic
dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles
riscv: dts: sophgo: Add initial SG2002 SoC device tree
riscv: dts: sophgo: Add LicheeRV Nano board device tree
.../interrupt-controller/sifive,plic-1.0.0.yaml | 1 +
.../devicetree/bindings/riscv/sophgo.yaml | 5 ++
arch/riscv/boot/dts/sophgo/Makefile | 1 +
.../boot/dts/sophgo/sg2002-licheerv-nano-b.dts | 54 ++++++++++++++++++++++
arch/riscv/boot/dts/sophgo/sg2002.dtsi | 32 +++++++++++++
5 files changed, 93 insertions(+)
---
base-commit: d20f6b3d747c36889b7ce75ee369182af3decb6b
change-id: 20240515-sg2002-93dce1d263be
Best regards,
Hi, Thomas,
This stuff is already too late for 6.11 as I already sent my PRs. I will
handle this next period.
Cheers,
Chen
