Hi Anand,
On 2024-07-10 16:19, Anand Moon wrote:
> Add missing pinctrl settings for PCIe 3.0 x4 clock request and wake
> signals. Rename node from 'pcie3' to 'pcie30x4' to align with schematic
> nomenclature.
>
> Signed-off-by: Anand Moon <linux.amoon@xxxxxxxxx>
> ---
> .../boot/dts/rockchip/rk3588-rock-5b.dts | 20 +++++++++++++------
> 1 file changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> index 2e7512676b7e..a9b55b7996cf 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> @@ -301,7 +301,7 @@ &pcie30phy {
>
> &pcie3x4 {
> pinctrl-names = "default";
> - pinctrl-0 = <&pcie3_rst>;
> + pinctrl-0 = <&pcie30x4_perstn_m1 &pcie30x4_clkreqn_m1 &pcie30x4_waken_m1>;
> reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
> vpcie3v3-supply = <&vcc3v3_pcie30>;
> status = "okay";
> @@ -340,14 +340,22 @@ pcie2_2_rst: pcie2-2-rst {
> };
> };
>
> - pcie3 {
> - pcie3_rst: pcie3-rst {
> - rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
> - };
> -
> + pcie30x4 {
> pcie3_vcc3v3_en: pcie3-vcc3v3-en {
> rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> +
> + pcie30x4_clkreqn_m1: pcie30x4-clkreqn-m1 {
> + rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + pcie30x4_waken_m1: pcie30x4-waken-m1 {
> + rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
Should these not be routed to the clkreqn_m1 and waken_m1 function
instead of gpio function?
E.g. something like:
pcie30x4m1_pins: pcie30x4m1-pins {
rockchip,pins =
<4 RK_PB4 4 &pcfg_pull_none>,
<4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
<4 RK_PB5 4 &pcfg_pull_none>;
};
There are other rk35xx boards where only the perstn pin is configured
and could use a similar fix.
Regards,
Jonas
> +
> + pcie30x4_perstn_m1: pcie30x4-perstn-m1 {
> + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> };
>
> usb {
>
> base-commit: 34afb82a3c67f869267a26f593b6f8fc6bf35905
