On 10/07/2024 10:41, Rayyan Ansari wrote:
> Pass dt_binding_check for qcom,apq8064-pinctrl.yaml.
dtbs_check
> Also correct spelling error ("drive-strengh" -> "drive-strength").
>
> Signed-off-by: Rayyan Ansari <rayyan.ansari@xxxxxxxxxx>
> ---
> .../dts/qcom/qcom-apq8064-asus-nexus7-flo.dts | 4 -
> .../boot/dts/qcom/qcom-apq8064-cm-qs600.dts | 25 +-
> .../boot/dts/qcom/qcom-apq8064-ifc6410.dts | 25 +-
> arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi | 362 +++++++-----------
> .../qcom-apq8064-sony-xperia-lagan-yuga.dts | 10 +-
> arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 34 +-
> 6 files changed, 172 insertions(+), 288 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom/qcom-apq8064-asus-nexus7-flo.dts
> index d460743fbb94..947183992850 100644
> --- a/arch/arm/boot/dts/qcom/qcom-apq8064-asus-nexus7-flo.dts
> +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-asus-nexus7-flo.dts
> @@ -125,8 +125,6 @@ &gsbi1 {
> &gsbi1_i2c {
> status = "okay";
> clock-frequency = <200000>;
> - pinctrl-0 = <&i2c1_pins>;
> - pinctrl-names = "default";
This looks unrelated - probably candidate for its own patch.
>
> eeprom@52 {
> compatible = "atmel,24c128";
> @@ -148,8 +146,6 @@ &gsbi3 {
>
> &gsbi3_i2c {
> clock-frequency = <200000>;
> - pinctrl-0 = <&i2c3_pins>;
> - pinctrl-names = "default";
> status = "okay";
>
> trackpad@10 {
> diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom/qcom-apq8064-cm-qs600.dts
> index 671d58cc2741..178c55c1efeb 100644
> --- a/arch/arm/boot/dts/qcom/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-cm-qs600.dts
> @@ -188,24 +188,17 @@ &sdcc4 {
> };
>
> &tlmm_pinmux {
> - card_detect: card_detect {
> - mux {
> - pins = "gpio26";
> - function = "gpio";
> - bias-disable;
> - };
> + card_detect: card-detect-state {
> + pins = "gpio26";
> + function = "gpio";
> + bias-disable;
> };
>
> - pcie_pins: pcie_pinmux {
> - mux {
> - pins = "gpio27";
> - function = "gpio";
> - };
> - conf {
> - pins = "gpio27";
> - drive-strength = <12>;
> - bias-disable;
> - };
> + pcie_pins: pcie-state {
> + pins = "gpio27";
> + function = "gpio";
> + drive-strength = <12>;
> + bias-disable;
> };
> };
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts
> index ed86b24119c9..b3ff8010b149 100644
> --- a/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts
> +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts
> @@ -321,24 +321,17 @@ &sdcc4 {
> };
>
> &tlmm_pinmux {
> - card_detect: card_detect {
> - mux {
> - pins = "gpio26";
> - function = "gpio";
> - bias-disable;
> - };
> + card_detect: card-detect-state {
> + pins = "gpio26";
> + function = "gpio";
> + bias-disable;
> };
>
> - pcie_pins: pcie_pinmux {
> - mux {
> - pins = "gpio27";
> - function = "gpio";
> - };
> - conf {
> - pins = "gpio27";
> - drive-strength = <12>;
> - bias-disable;
> - };
> + pcie_pins: pcie-state {
> + pins = "gpio27";
> + function = "gpio";
> + drive-strength = <12>;
> + bias-disable;
> };
> };
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
> index 7c545c50847b..e53de709e9d1 100644
> --- a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi
> @@ -1,318 +1,218 @@
> // SPDX-License-Identifier: GPL-2.0
>
> &tlmm_pinmux {
> - sdc4_gpios: sdc4-gpios {
> - pios {
> - pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
> - function = "sdc4";
> - };
> - };
> -
> - sdcc1_pins: sdcc1-pin-active {
> - clk {
> + sdcc1_default_state: sdcc1-default-state {
> + clk-pins {
> pins = "sdc1_clk";
> - drive-strengh = <16>;
> + drive-strength = <16>;
Such corrections should be separate patches.
> bias-disable;
> };
>
> - cmd {
> + cmd-pins {
> pins = "sdc1_cmd";
> - drive-strengh = <10>;
> + drive-strength = <10>;
> bias-pull-up;
> };
Best regards,
Krzysztof
