On 30.06.2024 12:25 PM, Akhil P Oommen wrote: > On Tue, Jun 25, 2024 at 08:28:06PM +0200, Konrad Dybcio wrote: >> On recent (SM8550+) Snapdragon platforms, the GPU speed bin data is >> abstracted through SMEM, instead of being directly available in a fuse. >> >> Add support for SMEM-based speed binning, which includes getting >> "feature code" and "product code" from said source and parsing them >> to form something that lets us match OPPs against. >> >> Due to the product code being ignored in the context of Adreno on >> production parts (as of SM8650), hardcode it to SOCINFO_PC_UNKNOWN. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> >> --- [...] > > This value is exposed to userspace via MSM_PARAM_CHIP_ID. 16 bits are > reserved for speedbin, so we should ensure somewhere that we don't > accidently use more than that. The "real" chip id is 32b, leaving the other 32 for speedbin, so it's fine > > Also, what is the the max value of fcode? I think we should leave some > space for pcode too. We never know for sure if that won't be required in > future. As of today it seems to be 0xff. Worst case scenario we'll add a new param, but hopefully the people that are in charge won't randomly change things.. Konrad
