Hi Sunyeal On 7/8/24 08:13, Sunyeal Hong wrote: > This adds support for CMU_TOP which generates clocks for all the > function blocks such as CORE, HSI0/1/2, PERIC0/1 and so on. For > CMU_TOP, PLL_SHARED0,1,2,3,4 and 5 will be the sources of this block > and they will generate bus clocks. > > Signed-off-by: Sunyeal Hong <sunyeal.hong@xxxxxxxxxxx> > --- > drivers/clk/samsung/Makefile | 1 + > drivers/clk/samsung/clk-exynosautov920.c | 1173 ++++++++++++++++++++++ > 2 files changed, 1174 insertions(+) > create mode 100644 drivers/clk/samsung/clk-exynosautov920.c > > diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile > index 3056944a5a54..f704b0e11d08 100644 > --- a/drivers/clk/samsung/Makefile > +++ b/drivers/clk/samsung/Makefile > @@ -25,3 +25,4 @@ obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-gs101.o > obj-$(CONFIG_S3C64XX_COMMON_CLK) += clk-s3c64xx.o > obj-$(CONFIG_S5PV210_COMMON_CLK) += clk-s5pv210.o clk-s5pv210-audss.o > obj-$(CONFIG_TESLA_FSD_COMMON_CLK) += clk-fsd.o > +obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynosautov920.o Must be sorted alphabetically. plz move below clk-exynosautov9 > diff --git a/drivers/clk/samsung/clk-exynosautov920.c b/drivers/clk/samsung/clk-exynosautov920.c > new file mode 100644 > index 000000000000..c24353bc04b7 > --- /dev/null > +++ b/drivers/clk/samsung/clk-exynosautov920.c > @@ -0,0 +1,1173 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (c) 2024 Samsung Electronics Co., Ltd. > + * Author: Sunyeal Hong <sunyeal.hong@xxxxxxxxxxx> > + * > + * Common Clock Framework support for ExynosAuto V9 SoC. There is some type. (V9 -> V920) Thanks Jaewon Kim
