On 05/07/2024 10:00, Jie Gan wrote:
Add binding document for Coresight Control Unit device.
nit: This is again too generic ? corsight-tmc-control-unit ? After all
thats what it is and not a *generic* coresight control unit ?
Signed-off-by: Jie Gan <quic_jiegan@xxxxxxxxxxx>
---
.../bindings/arm/qcom,coresight-ccu.yaml | 87 +++++++++++++++++++
1 file changed, 87 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml
new file mode 100644
index 000000000000..9bb8ced393a7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-ccu.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-ccu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: CoreSight Control Unit
+
+maintainers:
+ - Yuanfang Zhang <quic_yuanfang@xxxxxxxxxxx>
+ - Mao Jinlong <quic_jinlmao@xxxxxxxxxxx>
+ - Jie Gan <quic_jiegan@xxxxxxxxxxx>
+
+description:
+ The Coresight Control unit controls various Coresight behaviors.
+ Used to enable/disable ETR’s data filter function based on trace ID.
+
+properties:
+ compatible:
+ const: qcom,coresight-ccu
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: apb_pclk
+
+ reg-names:
+ items:
+ - const: ccu-base
+
+ in-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ unevaluatedProperties:
+ patternProperties:
+ '^port(@[0-7])?$':
+ description: Input connections from CoreSight Trace bus
+ $ref: /schemas/graph.yaml#/properties/port
+
+ properties:
+ qcom,ccu-atid-offset:
Why do we need this atid offset ? Couldn't this be mapped to the "port"
number ?
e.g, input-port 0 on CCU => Offset x
input-port 1 on CCU => (Offset x + Size of 1 region)
I believe I mentioned this in the previous posting too ?
Suzuki
