On 12:49 Mon 01 Jul , Emil Renner Berthing wrote:
> Yixun Lan wrote:
> > From: Yangyu Chen <cyy@xxxxxxxxxxxx>
> >
> > Banana Pi BPI-F3 motherboard is powered by SpacemiT K1[1].
> >
> > Key features:
> > - 4 cores per cluster, 2 clusters on chip
> > - UART IP is Intel XScale UART
> >
> > Some key considerations:
> > - ISA string is inferred from vendor documentation[2]
> > - Cluster topology is inferred from datasheet[1] and L2 in vendor dts[3]
> > - No coherent DMA on this board
> > Inferred by taking vendor ethernet and MMC drivers to the mainline
> > kernel. Without dma-noncoherent in soc node, the driver fails.
> > - No cache nodes now
> > The parameters from vendor dts are likely to be wrong. It has 512
> > sets for a 32KiB L1 Cache. In this case, each set is 64B in size.
> > When the size of the cache line is 64B, it is a directly mapped
> > cache rather than a set-associative cache, the latter is commonly
> > used. Thus, I didn't use the parameters from vendor dts.
> >
> > Currently only support booting into console with only uart, other
> > features will be added soon later.
> >
...
> > + clint: timer@e4000000 {
> > + compatible = "spacemit,k1-clint", "sifive,clint0";
> > + reg = <0x0 0xe4000000 0x0 0x10000>;
> > + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
> > + <&cpu1_intc 3>, <&cpu1_intc 7>,
> > + <&cpu2_intc 3>, <&cpu2_intc 7>,
> > + <&cpu3_intc 3>, <&cpu3_intc 7>,
> > + <&cpu4_intc 3>, <&cpu4_intc 7>,
> > + <&cpu5_intc 3>, <&cpu5_intc 7>,
> > + <&cpu6_intc 3>, <&cpu6_intc 7>,
> > + <&cpu7_intc 3>, <&cpu7_intc 7>;
> > + };
> > +
> > + uart0: serial@d4017000 {
> > + compatible = "spacemit,k1-uart", "intel,xscale-uart";
> > + reg = <0x0 0xd4017000 0x0 0x100>;
> > + interrupts = <42>;
> > + clock-frequency = <14857000>;
> > + reg-shift = <2>;
> > + reg-io-width = <4>;
> > + status = "disabled";
> > + };
> > +
> > + /* note: uart1 skipped */
>
> The datasheet page you link to above says "-UART (×10)", but here you're
> skipping one of them. Why? I can see the vendor tree does the same, but it
> would be nice with an explanation of what's going on.
>
/* note: uart1 in 0xf0612000, reserved for TEE usage */
I would put something like this, does this sound ok to you?
more detail, iomem range from 0xf000,0000 - 0xf080,0000 are dedicated for TEE purpose,
It won't be exposed to Linux once TEE feature is enabled..
skipping uart1 may make people confused but we are trying to follow datasheet..
--
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55
