On Thu, Jun 27, 2024 at 03:31:21PM +0000, Yixun Lan wrote: > From: Yangyu Chen <cyy@xxxxxxxxxxxx> > > The first SoC in the SpacemiT series is K1, which contains 8 RISC-V > cores with RISC-V Vector v1.0 support. > > Link: https://www.spacemit.com/en/spacemit-key-stone-2/ > Remove the blank line please. Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> Thanks, Conor. > Signed-off-by: Yangyu Chen <cyy@xxxxxxxxxxxx> > Signed-off-by: Yixun Lan <dlan@xxxxxxxxxx> > --- > arch/riscv/Kconfig.socs | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index f51bb24bc84c6..1916cf7ba450e 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -24,6 +24,11 @@ config ARCH_SOPHGO > help > This enables support for Sophgo SoC platform hardware. > > +config ARCH_SPACEMIT > + bool "SpacemiT SoCs" > + help > + This enables support for SpacemiT SoC platform hardware. > + > config ARCH_STARFIVE > def_bool SOC_STARFIVE > > > -- > 2.45.2 >
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