This series adds support for the Adreno X1-85 GPU found in Qualcomm's compute series chipset, Snapdragon X1 Elite (x1e80100). In this new naming scheme for Adreno GPU, 'X' stands for compute series, '1' denotes 1st generation and '8' & '5' denotes the tier and the SKU which it belongs. X1-85 has major focus on doubling core clock frequency and bandwidth throughput. It has a dedicated collapsible Graphics MX rail (gmxc) to power the memories and double the number of data channels to improve bandwidth to DDR. Mesa has the necessary bits present already to support this GPU. We are able to bring up Gnome desktop by hardcoding "0xffff43050a01" as chipid. Also, verified glxgears and glmark2. We have plans to add the new chipid support to Mesa in next few weeks, but these patches can go in right away to get included in v6.11. This series is rebased on top of msm-next branch. P3 cherry-picks cleanly on qcom/for-next. P1, P2 & P3 for Rob Clark P4 for Will Deacon P5 for Bjorn to pick up. Changes in v2: - Minor update to compatible pattern, '[x]' -> 'x' - Increased address space size (Rob) - Introduced gmu_chipid in a6xx_info (Rob) - Improved fallback logic for gmxc (Dmitry) - Rebased on top of msm-next - Picked a new patch for arm-mmu bindings update - Reordered gpu & gmu reg enties to match schema Akhil P Oommen (5): dt-bindings: display/msm/gmu: Add Adreno X185 GMU drm/msm/adreno: Add support for X185 GPU drm/msm/adreno: Introduce gmu_chipid for a740 & a750 dt-bindings: arm-smmu: Add X1E80100 GPU SMMU arm64: dts: qcom: x1e80100: Add gpu support .../devicetree/bindings/display/msm/gmu.yaml | 4 + .../devicetree/bindings/iommu/arm,smmu.yaml | 3 +- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 195 ++++++++++++++++++ drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 20 ++ drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 34 +-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 + drivers/gpu/drm/msm/adreno/adreno_gpu.h | 5 + 8 files changed, 239 insertions(+), 25 deletions(-) -- 2.45.1
