Reboot of gs101 SoC can be handled by setting the bit(SWRESET_SYSTEM[1]) of SYSTEM_CONFIGURATION register(PMU + 0x3a00). Poweroff of gs101 SoC can be handled by setting bit(DATA[8]) of PAD_CTRL_PWR_HOLD register (PMU + 0x3e9c). Tested using "reboot" and "poweroff -p" commands. Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> --- This feature has a runtime dependency on the following series https://lore.kernel.org/linux-arm-kernel/20240621115544.1655458-1-peter.griffin@xxxxxxxxxx/ and also the exynos-pmu and clk-gs101 patches in this series to be functional. --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index a66e996666b8..ce24b80985a2 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1394,6 +1394,21 @@ sysreg_apm: syscon@174204e0 { pmu_system_controller: system-controller@17460000 { compatible = "google,gs101-pmu", "syscon"; reg = <0x17460000 0x10000>; + + poweroff: syscon-poweroff { + compatible = "syscon-poweroff"; + regmap = <&pmu_system_controller>; + offset = <0x3e9c>; /* PAD_CTRL_PWR_HOLD */ + mask = <0x100>; /* reset value */ + }; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&pmu_system_controller>; + offset = <0x3a00>; /* SYSTEM_CONFIGURATION */ + mask = <0x2>; /* SWRESET_SYSTEM */ + value = <0x2>; /* reset value */ + }; }; pinctrl_gpio_alive: pinctrl@174d0000 { -- 2.45.2.741.gdbec12cfda-goog