Convert enetc device binding file to yaml. Split to 3 yaml files, 'fsl,enetc.yaml', 'fsl,enetc-mdio.yaml', 'fsl,enetc-ierb.yaml'. Additional Changes: - Add pci<vendor id>,<production id> in compatible string. - Ref to common ethernet-controller.yaml and mdio.yaml. - Remove fixed-link part. Signed-off-by: Frank Li <Frank.Li@xxxxxxx> --- Change from v1 to v2 - renamee file as fsl,enetc-mdio.yaml, fsl,enetc-ierb.yaml, fsl,enetc.yaml - example include pcie node --- .../bindings/net/fsl,enetc-ierb.yaml | 35 ++++++ .../bindings/net/fsl,enetc-mdio.yaml | 53 ++++++++ .../devicetree/bindings/net/fsl,enetc.yaml | 50 ++++++++ .../devicetree/bindings/net/fsl-enetc.txt | 119 ------------------ 4 files changed, 138 insertions(+), 119 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/fsl,enetc-ierb.yaml create mode 100644 Documentation/devicetree/bindings/net/fsl,enetc-mdio.yaml create mode 100644 Documentation/devicetree/bindings/net/fsl,enetc.yaml delete mode 100644 Documentation/devicetree/bindings/net/fsl-enetc.txt diff --git a/Documentation/devicetree/bindings/net/fsl,enetc-ierb.yaml b/Documentation/devicetree/bindings/net/fsl,enetc-ierb.yaml new file mode 100644 index 0000000000000..ce88d7ce07a5e --- /dev/null +++ b/Documentation/devicetree/bindings/net/fsl,enetc-ierb.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/fsl,enetc-ierb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Integrated Endpoint Register Block + +description: + The fsl_enetc driver can probe on the Integrated Endpoint Register + Block, which preconfigures the FIFO limits for the ENETC ports. + +maintainers: + - Frank Li <Frank.Li@xxxxxxx> + +properties: + compatible: + enum: + - fsl,ls1028a-enetc-ierb + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + ierb@1f0800000 { + compatible = "fsl,ls1028a-enetc-ierb"; + reg = <0xf0800000 0x10000>; + }; diff --git a/Documentation/devicetree/bindings/net/fsl,enetc-mdio.yaml b/Documentation/devicetree/bindings/net/fsl,enetc-mdio.yaml new file mode 100644 index 0000000000000..60740ea56cb08 --- /dev/null +++ b/Documentation/devicetree/bindings/net/fsl,enetc-mdio.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/fsl,enetc-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ENETC the central MDIO PCIe endpoint device + +description: + In this case, the mdio node should be defined as another PCIe + endpoint node, at the same level with the ENETC port nodes + +maintainers: + - Frank Li <Frank.Li@xxxxxxx>. + +properties: + compatible: + items: + - enum: + - pci1957,ee01 + - const: fsl,enetc-mdio + + reg: + maxItems: 1 + +required: + - compatible + - reg + +allOf: + - $ref: mdio.yaml + +unevaluatedProperties: false + +examples: + - | + pcie@1f0000000 { + compatible = "pci-host-ecam-generic"; + reg = <0x01 0xf0000000 0x0 0x100000>; + #address-cells = <3>; + #size-cells = <2>; + + mdio@0,3 { + compatible = "pci1957,ee01", "fsl,enetc-mdio"; + reg = <0x000300 0 0 0 0>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@2 { + reg = <0x2>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/fsl,enetc.yaml b/Documentation/devicetree/bindings/net/fsl,enetc.yaml new file mode 100644 index 0000000000000..843c27e357f2d --- /dev/null +++ b/Documentation/devicetree/bindings/net/fsl,enetc.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/fsl,enetc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ENETC ethernet + +description: + Depending on board design and ENETC port type (internal or + external) there are two supported link modes specified by + below device tree bindings. + +maintainers: + - Frank Li <Frank.Li@xxxxxxx> + +properties: + compatible: + items: + - enum: + - pci1957,e100 + - const: fsl,enetc + + reg: + maxItems: 1 + +required: + - compatible + - reg + +allOf: + - $ref: ethernet-controller.yaml + +unevaluatedProperties: false + +examples: + - | + pcie@1f0000000 { + compatible = "pci-host-ecam-generic"; + reg = <0x01 0xf0000000 0x0 0x100000>; + #address-cells = <3>; + #size-cells = <2>; + + ethernet@0,0 { + compatible = "pci1957,e100", "fsl,enetc"; + reg = <0x000000 0 0 0 0>; + phy-handle = <&sgmii_phy0>; + phy-connection-type = "sgmii"; + }; + }; diff --git a/Documentation/devicetree/bindings/net/fsl-enetc.txt b/Documentation/devicetree/bindings/net/fsl-enetc.txt deleted file mode 100644 index 9b9a3f197e2d3..0000000000000 --- a/Documentation/devicetree/bindings/net/fsl-enetc.txt +++ /dev/null @@ -1,119 +0,0 @@ -* ENETC ethernet device tree bindings - -Depending on board design and ENETC port type (internal or -external) there are two supported link modes specified by -below device tree bindings. - -Required properties: - -- reg : Specifies PCIe Device Number and Function - Number of the ENETC endpoint device, according - to parent node bindings. -- compatible : Should be "fsl,enetc". - -1. The ENETC external port is connected to a MDIO configurable phy - -1.1. Using the local ENETC Port MDIO interface - -In this case, the ENETC node should include a "mdio" sub-node -that in turn should contain the "ethernet-phy" node describing the -external phy. Below properties are required, their bindings -already defined in Documentation/devicetree/bindings/net/ethernet.txt or -Documentation/devicetree/bindings/net/phy.txt. - -Required: - -- phy-handle : Phandle to a PHY on the MDIO bus. - Defined in ethernet.txt. - -- phy-connection-type : Defined in ethernet.txt. - -- mdio : "mdio" node, defined in mdio.txt. - -- ethernet-phy : "ethernet-phy" node, defined in phy.txt. - -Example: - - ethernet@0,0 { - compatible = "fsl,enetc"; - reg = <0x000000 0 0 0 0>; - phy-handle = <&sgmii_phy0>; - phy-connection-type = "sgmii"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - sgmii_phy0: ethernet-phy@2 { - reg = <0x2>; - }; - }; - }; - -1.2. Using the central MDIO PCIe endpoint device - -In this case, the mdio node should be defined as another PCIe -endpoint node, at the same level with the ENETC port nodes. - -Required properties: - -- reg : Specifies PCIe Device Number and Function - Number of the ENETC endpoint device, according - to parent node bindings. -- compatible : Should be "fsl,enetc-mdio". - -The remaining required mdio bus properties are standard, their bindings -already defined in Documentation/devicetree/bindings/net/mdio.txt. - -Example: - - ethernet@0,0 { - compatible = "fsl,enetc"; - reg = <0x000000 0 0 0 0>; - phy-handle = <&sgmii_phy0>; - phy-connection-type = "sgmii"; - }; - - mdio@0,3 { - compatible = "fsl,enetc-mdio"; - reg = <0x000300 0 0 0 0>; - #address-cells = <1>; - #size-cells = <0>; - sgmii_phy0: ethernet-phy@2 { - reg = <0x2>; - }; - }; - -2. The ENETC port is an internal port or has a fixed-link external -connection - -In this case, the ENETC port node defines a fixed link connection, -as specified by Documentation/devicetree/bindings/net/fixed-link.txt. - -Required: - -- fixed-link : "fixed-link" node, defined in "fixed-link.txt". - -Example: - ethernet@0,2 { - compatible = "fsl,enetc"; - reg = <0x000200 0 0 0 0>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - -* Integrated Endpoint Register Block bindings - -Optionally, the fsl_enetc driver can probe on the Integrated Endpoint Register -Block, which preconfigures the FIFO limits for the ENETC ports. This is a node -with the following properties: - -- reg : Specifies the address in the SoC memory space. -- compatible : Must be "fsl,ls1028a-enetc-ierb". - -Example: - ierb@1f0800000 { - compatible = "fsl,ls1028a-enetc-ierb"; - reg = <0x01 0xf0800000 0x0 0x10000>; - }; -- 2.34.1
