Hi Srini,
On Sat, 22 Jun 2024 at 17:49, Srinivas Kandagatla
<srinivas.kandagatla@xxxxxxxxxx> wrote:
>
> Add support for the pin controller block on SM4250 Low Power Island.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
> ---
> drivers/pinctrl/qcom/Kconfig | 9 +
> drivers/pinctrl/qcom/Makefile | 1 +
> drivers/pinctrl/qcom/pinctrl-sm4250-lpass-lpi.c | 236 ++++++++++++++++++++++++
> 3 files changed, 246 insertions(+)
>
> diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
> index 24619e80b2cc..dd9bbe8f3e11 100644
> --- a/drivers/pinctrl/qcom/Kconfig
> +++ b/drivers/pinctrl/qcom/Kconfig
> @@ -68,6 +68,15 @@ config PINCTRL_SC7280_LPASS_LPI
> Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
> (Low Power Island) found on the Qualcomm Technologies Inc SC7280 platform.
>
> +config PINCTRL_SM4250_LPASS_LPI
> + tristate "Qualcomm Technologies Inc SM4250 LPASS LPI pin controller driver"
> + depends on ARM64 || COMPILE_TEST
> + depends on PINCTRL_LPASS_LPI
> + help
> + This is the pinctrl, pinmux, pinconf and gpiolib driver for the
> + Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
> + (Low Power Island) found on the Qualcomm Technologies Inc SM4250 platform.
> +
> config PINCTRL_SM6115_LPASS_LPI
> tristate "Qualcomm Technologies Inc SM6115 LPASS LPI pin controller driver"
> depends on ARM64 || COMPILE_TEST
> diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
> index e2e76071d268..eb04297b6388 100644
> --- a/drivers/pinctrl/qcom/Makefile
> +++ b/drivers/pinctrl/qcom/Makefile
> @@ -43,6 +43,7 @@ obj-$(CONFIG_PINCTRL_SDM845) += pinctrl-sdm845.o
> obj-$(CONFIG_PINCTRL_SDX55) += pinctrl-sdx55.o
> obj-$(CONFIG_PINCTRL_SDX65) += pinctrl-sdx65.o
> obj-$(CONFIG_PINCTRL_SDX75) += pinctrl-sdx75.o
> +obj-$(CONFIG_PINCTRL_SM4250_LPASS_LPI) += pinctrl-sm4250-lpass-lpi.o
> obj-$(CONFIG_PINCTRL_SM4450) += pinctrl-sm4450.o
> obj-$(CONFIG_PINCTRL_SM6115) += pinctrl-sm6115.o
> obj-$(CONFIG_PINCTRL_SM6115_LPASS_LPI) += pinctrl-sm6115-lpass-lpi.o
> diff --git a/drivers/pinctrl/qcom/pinctrl-sm4250-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sm4250-lpass-lpi.c
> new file mode 100644
> index 000000000000..2d2c636a3e20
> --- /dev/null
> +++ b/drivers/pinctrl/qcom/pinctrl-sm4250-lpass-lpi.c
> @@ -0,0 +1,236 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2020, 2023 Linaro Ltd.
> + */
> +
> +#include <linux/gpio/driver.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +
> +#include "pinctrl-lpass-lpi.h"
> +
> +enum lpass_lpi_functions {
> + LPI_MUX_dmic01_clk,
> + LPI_MUX_dmic01_data,
> + LPI_MUX_dmic23_clk,
> + LPI_MUX_dmic23_data,
> + LPI_MUX_dmic4_clk,
> + LPI_MUX_dmic4_data,
> + LPI_MUX_ext_mclk0_a,
> + LPI_MUX_ext_mclk0_b,
> + LPI_MUX_ext_mclk1_a,
> + LPI_MUX_ext_mclk1_b,
> + LPI_MUX_ext_mclk1_c,
> + LPI_MUX_i2s1_clk,
> + LPI_MUX_i2s1_data,
> + LPI_MUX_i2s1_ws,
> + LPI_MUX_i2s2_clk,
> + LPI_MUX_i2s2_data,
> + LPI_MUX_i2s2_ws,
> + LPI_MUX_i2s3_clk,
> + LPI_MUX_i2s3_data,
> + LPI_MUX_i2s3_ws,
> + LPI_MUX_qup_io_00,
> + LPI_MUX_qup_io_01,
> + LPI_MUX_qup_io_05,
> + LPI_MUX_qup_io_10,
> + LPI_MUX_qup_io_11,
> + LPI_MUX_qup_io_25,
> + LPI_MUX_qup_io_21,
> + LPI_MUX_qup_io_26,
> + LPI_MUX_qup_io_31,
> + LPI_MUX_qup_io_36,
> + LPI_MUX_qua_mi2s_data,
> + LPI_MUX_qua_mi2s_sclk,
> + LPI_MUX_qua_mi2s_ws,
> + LPI_MUX_slim_clk,
> + LPI_MUX_slim_data,
> + LPI_MUX_sync_out,
> + LPI_MUX_swr_rx_clk,
> + LPI_MUX_swr_rx_data,
> + LPI_MUX_swr_tx_clk,
> + LPI_MUX_swr_tx_data,
> + LPI_MUX_swr_wsa_clk,
> + LPI_MUX_swr_wsa_data,
> + LPI_MUX_gpio,
> + LPI_MUX__,
> +};
> +
> +static const struct pinctrl_pin_desc sm4250_lpi_pins[] = {
> + PINCTRL_PIN(0, "gpio0"),
> + PINCTRL_PIN(1, "gpio1"),
> + PINCTRL_PIN(2, "gpio2"),
> + PINCTRL_PIN(3, "gpio3"),
> + PINCTRL_PIN(4, "gpio4"),
> + PINCTRL_PIN(5, "gpio5"),
> + PINCTRL_PIN(6, "gpio6"),
> + PINCTRL_PIN(7, "gpio7"),
> + PINCTRL_PIN(8, "gpio8"),
> + PINCTRL_PIN(9, "gpio9"),
> + PINCTRL_PIN(10, "gpio10"),
> + PINCTRL_PIN(11, "gpio11"),
> + PINCTRL_PIN(12, "gpio12"),
> + PINCTRL_PIN(13, "gpio13"),
> + PINCTRL_PIN(14, "gpio14"),
> + PINCTRL_PIN(15, "gpio15"),
> + PINCTRL_PIN(16, "gpio16"),
> + PINCTRL_PIN(17, "gpio17"),
> + PINCTRL_PIN(18, "gpio18"),
> + PINCTRL_PIN(19, "gpio19"),
> + PINCTRL_PIN(20, "gpio20"),
> + PINCTRL_PIN(21, "gpio21"),
> + PINCTRL_PIN(22, "gpio22"),
> + PINCTRL_PIN(23, "gpio23"),
> + PINCTRL_PIN(24, "gpio24"),
> + PINCTRL_PIN(25, "gpio25"),
> + PINCTRL_PIN(26, "gpio26"),
> +};
This doesn't probe() on qrb4210 RB2 for me with the following trace:
[ 10.709014] ------------[ cut here ]------------
[ 10.719085] WARNING: CPU: 1 PID: 56 at
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c:446
lpi_pinctrl_probe+0x308/0x388 [pinctrl_lpass_lpi]
[ 10.719108] Modules linked in: btqca qrtr btbcm qcom_q6v5_pas
libarc4 qcom_pil_info llcc_qcom bluetooth snd_soc_sm8250 ocmem
qcom_q6v5 snd_soc_qcom_sdw cfg80211 drm_exec qcom_sysmon
snd_soc_qcom_common gpu_sched crct10dif_ce qcom_common soundwire_bus
ecdh_generic qcom_glink_smem pinctrl_sm4250_lpass_lpi qcom_pmic_tcpm
drm_dp_aux_bus ecc mdt_loader qcom_wdt pinctrl_lpass_lpi
drm_display_helper qmi_helpers tcpm dispcc_sm6115 rfkill gpucc_sm6115
aux_hpd_bridge qcom_usb_vbus_regulator nvmem_qcom_spmi_sdam
qcom_spmi_temp_alarm qcom_pbs qcom_pon qcom_spmi_adc5 qcom_vadc_common
spi_geni_qcom gpi qcom_stats icc_bwmon qcom_rng qcrypto authenc
phy_qcom_qmp_usbc display_connector rpmsg_ctrl libdes typec rpmsg_char
phy_qcom_qusb2 drm_kms_helper rmtfs_mem socinfo i2c_gpio fuse drm
backlight dm_mod ip_tables x_tables ipv6
[ 10.719238] CPU: 1 PID: 56 Comm: kworker/u33:0 Not tainted
6.10.0-rc2-00012-ge45ddb1f8d34-dirty #7
[ 10.719245] Hardware name: Qualcomm Technologies, Inc. QRB4210 RB2 (DT)
[ 10.719250] Workqueue: events_unbound deferred_probe_work_func
[ 10.719265] pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 10.719271] pc : lpi_pinctrl_probe+0x308/0x388 [pinctrl_lpass_lpi]
[ 10.719278] lr : lpi_pinctrl_probe+0x44/0x388 [pinctrl_lpass_lpi]
[ 10.719284] sp : ffff80008035bb40
[ 10.719286] x29: ffff80008035bb40 x28: 0000000000000000 x27: 0000000000000000
[ 10.719294] x26: ffff7eea83029428 x25: ffffa0c480a67510 x24: ffff7eea83be5800
[ 10.719301] x23: ffff7eea83be5810 x22: 0000000000000000 x21: ffffa0c480a64030
[ 10.719308] x20: ffff7eea83be5810 x19: ffff7eea89e59880 x18: ffffffffffffffff
[ 10.719315] x17: 0000000000000000 x16: ffffa0c4f34949a4 x15: ffff80008035b7f0
[ 10.719321] x14: ffffffffffffffff x13: 006c7274636e6970 x12: 2e30303030633761
[ 10.719329] x11: 0101010101010101 x10: ffffa0c4f4b28ff2 x9 : 0000000000000008
[ 10.719335] x8 : 0000000000000008 x7 : ffffa0c4f3cfa640 x6 : 0000000000000020
[ 10.719342] x5 : 0000000000000020 x4 : 0000000000000000 x3 : ffffa0c480a67448
[ 10.719348] x2 : ffffa0c480a67468 x1 : ffff7eea838b8000 x0 : 000000000000001b
[ 10.719357] Call trace:
[ 10.719361] lpi_pinctrl_probe+0x308/0x388 [pinctrl_lpass_lpi]
[ 10.719369] platform_probe+0x68/0xc4
[ 10.719378] really_probe+0xbc/0x29c
[ 10.719384] __driver_probe_device+0x78/0x12c
[ 10.719390] driver_probe_device+0xd8/0x15c
[ 10.719395] __device_attach_driver+0xb8/0x134
[ 10.719401] bus_for_each_drv+0x88/0xe8
[ 10.719407] __device_attach+0xa0/0x190
[ 10.719412] device_initial_probe+0x14/0x20
[ 10.719418] bus_probe_device+0xac/0xb0
[ 10.719423] deferred_probe_work_func+0x88/0xc0
[ 10.719429] process_one_work+0x150/0x294
[ 10.719439] worker_thread+0x2f8/0x408
[ 10.719445] kthread+0x110/0x114
[ 10.719452] ret_from_fork+0x10/0x20
[ 10.719459] ---[ end trace 0000000000000000 ]---
[ 10.719589] qcom-sm4250-lpass-lpi-pinctrl a7c0000.pinctrl: probe
with driver qcom-sm4250-lpass-lpi-pinctrl failed with error -22
[...]
Thanks,
Alexey
