On Wed, Jun 19, 2024 at 02:33:46PM +0000, 韵涛 代 wrote: > Hi Conor, Something has gone fairly badly wrong with your mail client FYI: > > > From: Conor Dooley > > Sent: Tuesday, June 18, 2024 23:38 > > To: Yuntao Dai > > Cc: jassisinghbrar@xxxxxxxxx; robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx; unicorn_wang@xxxxxxxxxxx; inochiama@xxxxxxxxxxx; paul.walmsley@xxxxxxxxxx; palmer@xxxxxxxxxxx; aou@xxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-riscv@xxxxxxxxxxxxxxxxxxx > > Subject: Re: [PATCH 1/3] dt-bindings: mailbox: add Sophgo cv18x SoCs mailbox > > > > > > On Tue, Jun 18, 2024 at 11:12:33PM +0800, Yuntao Dai wrote: > > > > > Add devicetree bindings documentation for Sophgo cv18x SoCs mailbox > > > > > > > > > > Signed-off-by: Yuntao Dai <d1581209858@xxxxxxxx> > > > > > --- > > > > > .../mailbox/sophgo,cv1800b-mailbox.yaml | 75 +++++++++++++++++++ > > > > > 1 file changed, 75 insertions(+) > > > > > create mode 100644 Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml > > > > > > > > > > diff --git a/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml > > > > > new file mode 100644 > > > > > index 000000000..e1868aaf2 > > > > > --- /dev/null > > > > > +++ b/Documentation/devicetree/bindings/mailbox/sophgo,cv1800b-mailbox.yaml > > > > > @@ -0,0 +1,75 @@ > > > > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > > > > +%YAML 1.2 > > > > > +--- > > > > > +$id: http://devicetree.org/schemas/mailbox/sophgo,cv1800b-mailbox.yaml# > > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > > > + > > > > > +title: Sophgo cv1800b mailbox controller > > > > > + > > > > > +maintainers: > > > > > + - Yuntao Dai <d1581209858@xxxxxxxx> > > > > > + > > > > > +description: > > > > > + The Sophgo cv18x SoCs mailbox has 8 channels and 8 bytes per channel for > > > > > + different processors. Any processer can write data in a channel, and > > > > > + set co-responding register to raise interrupt to notice another processor, > > > > > + and it is allowed to send data to itself. > > > > > + Sophgo cv18x SoCs has 3 processors and numbered as > > > > > + <1> C906L > > > > > + <2> C906B > > > > > + <3> 8051 > > > > > + > > > > > +properties: > > > > > + compatible: > > > > > + enum: > > > > > + - sophgo,cv1800b-mailbox > > > > > + > > > > > + reg: > > > > > + maxItems: 1 > > > > > + > > > > > + interrupts: > > > > > + maxItems: 1 > > > > > + > > > > > + interrupt-names: > > > > > + const: mailbox > > > > > + > > > > > + recvid: > > > > > + maxItems: 1 > > > > > + description: > > > > > + This cell indicates the mailbox controller is running on which processor > > > > > > > > You can just look up your hartid at runtime, wouldn't that be > > > > sufficient? > > > > thanks your addvice, I will fix it This advice may or may not be correct, that's why I put a ? at the end. If the hart id of both the C906L and C906B are identical, looking the hart up at runtime isn't going to help you. If they're different, cpuid_to_hartid_map(0) will give you the info I believe.
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